2017
DOI: 10.1007/s10825-017-1081-9
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Single photonic crystal structure for realization of NAND and NOR logic functions by cascading basic gates

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Cited by 28 publications
(10 citation statements)
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“…6, this value is obtained as cT = 66 µm, which equals 0.22 ps. The fall time is equal to the time when the output power has been reduced from mode one logical level to 10% of output power [26]. To display this value, a pulse is given to the logical gate input and the output diagram is plotted, as shown in Fig.…”
Section: Resultsmentioning
confidence: 99%
“…6, this value is obtained as cT = 66 µm, which equals 0.22 ps. The fall time is equal to the time when the output power has been reduced from mode one logical level to 10% of output power [26]. To display this value, a pulse is given to the logical gate input and the output diagram is plotted, as shown in Fig.…”
Section: Resultsmentioning
confidence: 99%
“…Depending on the type of resonance used for the design, the response time will be different. Shorter response time will result in very high data transmission speeds [28].…”
Section: Simulation Methodsmentioning
confidence: 99%
“…It is better to have a high contrast ratio or ON to OFF ratio. Destructive and constructive interferences between the inputs signals provide low-and high-output power levels corresponding to the logic '0' and the logic '1' [4]. Therefore, reducing the output power level (P 0 ) further increases the CR.…”
Section: Design Of the All-optical Toffoli Gatementioning
confidence: 99%
“…Therefore, all-optical logic gates become one of the vital aspects of the implementation of signal processing and networks. Realisation of all-optical logic gates can be achieved via various techniques such as photonic crystals (PCs) [4][5][6][7], ring resonators [8][9][10], semiconductor optical amplifiers, and so on [11].…”
Section: Introductionmentioning
confidence: 99%