Single step fabrication of Silicon resistors on SOI substrate used as Thermistors

Abstract

Temperature sensing is one of the important features of Micro Electro Mechanical Systems and a monolithic integration provides advantages for both fabrication simplicity and performance. The use of Silicon On Insulator substrates allows simple fabrication of integrated wires that can be used as thermistors. We fabricated rectangular and triangular silicon wires with different dimensions in a single step fabrication process based on the wet etching of a <110> Silicon On Insulator substrate. We determined the experimental resistivity of the two kinds of devices and tested their performance as thermistors in a temperature range between 24 and 100 °C. The accuracy and normalized sensitivities of our devices were 0.4 °C and 0.3–0.5%/°C, respectively. The potential of the proposed method resides in the possibility of having devices with different shapes in a single straightforward process.

High performance Fin-FET electrochemical sensor with high-k dielectric materials

“…The etching along the vertical direction (<110> plane) is about 10 times faster than along the <111> planes. Knowing the plane dependent etching rates 36 and device layer thickness of Si, lithography mask was designed with defined line widths to have final wire width on the chips. The connection between the lines and the contact pads was achieved through approaching pads with a triangular footprint designed at the angles of ≈54.7° and 35.3° with respect to the primary flat to provide a smooth profile between the channel and the pads after etching.…”

Combining Chemical Functionalization and FinFET Geometry for Field Effect Sensors as Accessible Technology to Optimize pH Sensing

“…However, using combinations of optical lithography and wet etching that take advantage of the anisotropic properties of crystalline silicon, it is possible to bring the lateral resolution down to a size comparable to the depletion width induced by the pH changes. Thus, optically lithographed nanowires can become very sensitive [13,14]. These fabrication processes are also accessible because the dielectric gate can be achieved without the use of large resources using thermal oxidation of silicon to obtain an SiO 2 dielectric barrier, where protons are adsorbed and sensed.…”

Highly Efficient Filterless Bilateral Majority Carrier‐Type Color Photodetectors

“…As observed, a sharp borderline exists between the device layer and BOX layer of the SOI. [ 19 ] The front side of the SOI was polished, where the G–I–SOI junctions were formed.…”

“…The alternative approach involved the employment of a thin silicon layer (2.3 µm thickness) of a silicon‐on‐insulator (SOI) wafer as a light‐absorbing layer that incorporates two distinct interfaces while its thickness is in comparison to the light absorption length. [ 19,20 ]…”