1997
DOI: 10.1109/68.643291
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Skewless optical data-link subsystem for massively parallel processors using 8 Gb/s x 1.1 Gb/s MMF array optical module

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Cited by 9 publications
(2 citation statements)
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“…A hybrid solution is to skip the separate clock channel and encode clock information on the data channels, but still send in bit-parallel mode as reported in Ref. 17. In this case, a deskew unit relying on first in, first out ͑FIFO͒ registers ensures that parallel data words that are output from the receiver are identical with those that were sent.…”
Section: Implementation Aspectsmentioning
confidence: 99%
“…A hybrid solution is to skip the separate clock channel and encode clock information on the data channels, but still send in bit-parallel mode as reported in Ref. 17. In this case, a deskew unit relying on first in, first out ͑FIFO͒ registers ensures that parallel data words that are output from the receiver are identical with those that were sent.…”
Section: Implementation Aspectsmentioning
confidence: 99%
“…The disadvantage is increased hardware complexity when a clock recovery circuit and a buffer circuit for each channel in the receiver are added. A hybrid solution is to skip the separate clock channel and encode clock information on the data channels while still sending in bit-parallel mode, as reported in [24]. In this case, a deskew unit relying on FIFO registers (First In First Out) ensures that parallel data words that are output from the receiver are identical to those which were sent.…”
Section: Fiber-ribbon Linksmentioning
confidence: 99%