2022
DOI: 10.3390/electronics11233906
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SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption

Abstract: The current trend to globalize the supply chain in the Integrated Circuits (ICs) industry has raised several security concerns including, among others, IC overproduction. Over the past years, logic locking has grown into a prominent countermeasure to tackle this threat in particular. Logic locking consists of “locking” an IC with an added primary input, the so-called key, which, unless fed with the correct secret value, renders the ICs unusable. One of the first criteria ensuring the quality of a logic locking… Show more

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Cited by 4 publications
(3 citation statements)
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“…In order to assess the quality of the proposed solution, we locked several ISCAS benchmarks [27], inserting 5% extra key-gates and using either the conventional XOR/XNOR keygates or the new tristate-based key-gates. Two insertion algorithms were considered, namely the FLL algorithm [4] and an improved version of the FpLL algorithm [5] for better output corruption and faster execution time.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…In order to assess the quality of the proposed solution, we locked several ISCAS benchmarks [27], inserting 5% extra key-gates and using either the conventional XOR/XNOR keygates or the new tristate-based key-gates. Two insertion algorithms were considered, namely the FLL algorithm [4] and an improved version of the FpLL algorithm [5] for better output corruption and faster execution time.…”
Section: Resultsmentioning
confidence: 99%
“…It was then proposed in [3] to add a complementary metric, as the number of input vectors causing corruption, in order to ensure that most input vectors created corruption. A third metric was then proposed in [5] as the total number of outputs having been corrupted at least once, ideally all. In the sequel of the paper, we will use the following denomination: Output corruptibility is the average percentage Hamming distance between correct and erroneous outputs, Corruption rate is the percentage of input vectors that lead to output corruption, Output coverage is the percentage of outputs that have been corrupted at least once.…”
Section: Introductionmentioning
confidence: 99%
“…The method based on the insertion of key gates in the so-called interference mode, proposed in [8], is claimed to have less hardware overhead, higher speed, and to be more effective against SAT attacks than the existing conventional methods. A provable secure logic locking scheme that can thwart SAT-based attacks was proposed in [9]. The authors in [15] propose a generalized method for logic locking that is resistant against SAT attack.…”
Section: Logic Circuits and Their Securitymentioning
confidence: 99%