Slip defect generation on GaAs wafers during high temperature process: a thermoelastic study from a crystallographic viewpoint

Abstract

In this work we investigate the mechanism of slip defect generation, using a simple heat flow simulation during an MBE process, a wafer heating apparatus, and a thermoelastic analysis from a crystallographic viewpoint. We find that the slip defect pattern predicted from the analysis agrees with the experiment and confirm that slip defects are prone to occur at orientation flat (OF) and notch edge.

Thermal processing induced plastic deformation in GaAs wafers

“…Fig. 2 shows in good agreement to the experimental results [1][2][3][4][5][6][7][8][9] that the area where minority type dislocations can exist ranges from about 10°to about 35°around 110 peripheral areas. Our model does not give an explanation for the frequently observed predominance of minority type dislocation bundles at the major flat, but this is to be expected from our assumption of a perfectly circular wafer.…”

“…The models given in [1,2,9] describe the frequently occurring predominance of minority type dislocation bundles at the area of the major flat reasonably well, but are not applicable to majority type dislocation bundles since they predict a spatial distribution with an eightfold symmetry. Applying Curie's well-known symmetry principle [10,11], we found that the symmetry of this set is the point group 4( 2m [6], which does not contain an eight-fold symmetry axis.…”

“…It is well known that thermal treatment induced plastic deformation in GaAs substrates is a key factor that reduces the yield of opto-and microelectronic devices in manufacturing processes on an industrial scale [1][2][3]. We observed severe plastic deformation in the GaAs substrates of epitaxial III -V compound semiconductor samples that were grown in molecular beam epitaxy (MBE) machines of three different makes [4].…”

Dislocation patterning and bunching in crystals and epitaxial layers ‐ a review

“…The X‐ray transmission analysis showed that this phenomenon has nothing to do with lattice misfit but solely with thermal treatment induced plastic deformation . Even temperature inhomogeneities across the area of the substrate holder are responsible for the formation of such slip lines . It is assumed that the nucleation of majority‐type dislocation bundles took place as half‐loops at surface irregularities at the wafer edge.…”