Small area cross type integrated inductor in CMOS Technology

Moreira, Luiz Carlos; Noije, Wilhelmus Van; Farfan-Pelaez, A.; Anjos, Angélica dos

doi:10.1109/imoc.2007.4404238

Cited by 5 publications

(10 citation statements)

References 4 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The original cross inductor, shown in Fig. 3(a), was presented in 2007 [9] as an innovative structure having a geometric design that minimizes area consumption on integrated circuit projects. This structure needs three metal layers to its implementation and its segments form two groups: the core and the connection segments.…”

Section: B Scalable Cross Inductormentioning

confidence: 99%

“…As explained, (8) and (9) work just over the low-frequency range, and, N is the amount of simulated data in the range, from DC to 5% f C , and are, respectively, the real and imaginary parts of each value of the inverse of serial admittance. From (8) and (9), C S , the capacitance between the inductor's metal segments, is:…”

Section: A Elements Value Extraction Proceduresmentioning

confidence: 99%

See 1 more Smart Citation

Design Equations for Spiral and Scalable Cross Inductors on 0.35 μm CMOS Technology

Neto

Moreira

Correra

2018

J. Microw. Optoelectron. Electromagn. Appl.

View full text Add to dashboard Cite

This paper presents a set of design equations for spiral and new scalable cross inductors in CMOS 0.35 μm technology, relating electrical parameters of the inductor's equivalent circuit as functions of its geometric dimensions. The procedure used to derive the design equations is described and involves electromagnetic simulation of inductors with different geometric dimensions, extraction of values for equivalent circuit model elements for each inductor and the use of multivariate regression analysis applied to generalized linear models (GLM) based on Design of Experiments (DoE). A nine element -type equivalent electrical circuit was used for the inductors, where all element values are constants, allowing simulation on SPICE-like software. Results from the models obtained for both spiral and scalable cross inductors presented closely match to the simulated results.

show abstract

Section: B Scalable Cross Inductormentioning

confidence: 99%

Section: A Elements Value Extraction Proceduresmentioning

confidence: 99%

Design Equations for Spiral and Scalable Cross Inductors on 0.35 μm CMOS Technology

Neto

Moreira

Correra

2018

J. Microw. Optoelectron. Electromagn. Appl.

View full text Add to dashboard Cite

show abstract

“…We believed that new geometries allow optimizations of the quality factor, of the inductance values and of the resonance frequencies without the need of alterations in the technology. This new developed structure is an evolution that is based on previous work of structures of planar inductors, such as: the vertical and, the zig-zag [2,3]. The cross inductor has two regions: the core, where the segments are crossed perpendicularly; and the external ring, where the segments are 45 • respect to the core segments, to close the loops among them.…”

Section: Theoretical Issues Of On-chip Planar Inductorsmentioning

confidence: 99%

Comparison of small cross inductors and rectangular inductors designed in 0.35um CMOS technology

Moreira

Noije

Pabón

et al. 2009

Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes

Self Cite

View full text Add to dashboard Cite

This paper describes the design, and experimental characterization of cross inductors in a 0.35µm CMOS technology. The Sonnet tools were used to simulate and evaluate the performance of the new inductor structure, whose core has perpendicular crossed segments at the two highest layers available of the technology. Due to this arrangement, the positive as well as the negative mutual inductance are almost null. To make a fair comparison, the new structure and conventional rectangular inductor were designed to get similar inductance value, and with the same segment width and spacing fixed at 10µm. The proposed cross structure occupied an area of 160x140µm 2 while the square planar inductor presents an area of 180x180µm 2 . Thus, the last one occupies 45% more area than the cross inductor. Some deembedding structures were fabricated and used to subtract the effect of the test-fixture in the on-wafer measurements. The main experimental results are: for cross inductor an inductance value of 2.1nH and Q of 3.3 at 5.2GHz and for the square one an inductance of 1.9nH and Q of 5.5 at 5.5GHz. Although, for similar inductance value, the quality factor of the cross inductor is lower than for the rectangular inductor one, the new cross inductor structure shows to be useful at RF circuits where the inductors are largely used and the most area consuming components.

show abstract

“…Há várias soluções propostas para minimizar as perdas nos indutores, como o uso de materiais com alta condutividade nas trilhas das espiras [25] , substratos de alta resistividade à base de safira [26] , camadas metálicas de blindagem entre o indutor e o substrato [27] , porém, todas apresentam desvantagens, pois substratos de alta resistência encarecem o processo de fabricação, assim como o uso de proposto em 2007, Moreira et al [28] , para operar até a faixa de frequências de micro- [28] , bem como a extensão da arquitetura cross para permitir quantidades variáveis de trilhas.…”

Section: Contudounclassified

“…A dificuldade para extração dos parâmetros nestes modelos mais elaborados e a necessidade de produzir um modelo simples, que apenas estime os valores dos parâmetros do circuito equivalente levou ao desenvolvimento apresentado a seguir. planares, cuja arquitetura foi proposta em [28] , com o objetivo de reduzir a área ocupada e aumentar a indutância por área. Concebida originalmente para a tecnologia CMOS, cujos custos de produção são proporcionais à área ocupada, ainda é uma arquitetura nova e as poucas aplicações encontradas na literatura foram propostas por Moreira [18] [22] e Rios [37] .…”

Section: Descrição Dos Capítulosunclassified

Projeto e modelagem de indutores planares para aplicações em circuitos integrados de radiofrequência.

Neto¹

View full text Add to dashboard Cite

show abstract

Small area cross type integrated inductor in CMOS Technology

Cited by 5 publications

References 4 publications

Design Equations for Spiral and Scalable Cross Inductors on 0.35 μm CMOS Technology

Design Equations for Spiral and Scalable Cross Inductors on 0.35 μm CMOS Technology

Comparison of small cross inductors and rectangular inductors designed in 0.35um CMOS technology

Projeto e modelagem de indutores planares para aplicações em circuitos integrados de radiofrequência.

Contact Info

Product

Resources

About