For embedded systems in harsh environments, a radiation robust circuit design is still an open challenge. As complementary metal oxide semiconductor (CMOS) processes get denser and smaller, their immunity towards particle strikes decreases drastically. Due to its radiation effects good tolerance and its inherent non-volatility, Spin-Transfer Torque Magnetic Tunnel Junction (STT-MTJ) is considered a promising candidate for high reliability electronics. Nevertheless, when integrated in CMOS circuit, these magnetic devices could be still affected by upsets. To decrease the probability of this occurrence, a radiation robust setup is used to calibrate a physics-based 20 nm MTJ compact model, integrated in a 28 nm Fully Depleted Silicon on Insulator Technology. Thus, a radiation hardening by design (RHBD) solution is presented, where a non-volatile sequential block enables one to mitigate the Single Event Effects (SEEs).