2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2022
DOI: 10.1109/isvlsi54635.2022.00021
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Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters

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“…Assume a shared-L1 cluster implementation with C = 2 PEs, each controlling F = 4 FPUs. The eight FPUs per cluster are similar to equivalent Snitch-based clusters [8]. Based on [21], we estimate that it costs εPE = 3.1 pJ for Snitch to fetch, decode, and dispatch an instruction of the matrix multiplication kernel and εFPU = 13.3 pJ for an FPU to execute a double-precision FMA instruction.…”
Section: B Energy Efficiency Optimizationmentioning
confidence: 96%
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“…Assume a shared-L1 cluster implementation with C = 2 PEs, each controlling F = 4 FPUs. The eight FPUs per cluster are similar to equivalent Snitch-based clusters [8]. Based on [21], we estimate that it costs εPE = 3.1 pJ for Snitch to fetch, decode, and dispatch an instruction of the matrix multiplication kernel and εFPU = 13.3 pJ for an FPU to execute a double-precision FMA instruction.…”
Section: B Energy Efficiency Optimizationmentioning
confidence: 96%
“…Furthermore, another long path starting at the L0 I$ and through Snitch (without leaving the core) is about the same length. Therefore, Spatz' inclusion does not limit the cluster operating frequency, which is the same as that of the scalar Snitch-based cluster [8].…”
Section: B Area Analysis and Breakdownmentioning
confidence: 99%
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