Software Verification: 10th Comparative Evaluation (SV-COMP 2021)

Beyer, Dirk

doi:10.1007/978-3-030-72013-1_24

Cited by 51 publications

(25 citation statements)

References 80 publications

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“…Both the production of names for iterated diff-terms and the variable instantiations of the universal quantifiers in the equivalent universal T I ∪ EUF -formulae need in principle to be repeated infinitely many times; what we prove (this is the content of our main Theorem 7 below) is that a pre-determined polynomial size subset of such manipulations is sufficient for the T I ∪ EUF -interpolation module to produce the interpolant we are looking for. 4 Related work. We already mentioned the related work on first-order theories axiomatizing arrays [22,20,7,17], which our theories of contiguous arrays strictly extend.…”

Section: Plan Of the Papermentioning

confidence: 99%

“…We now address the problem of checking satisfiability of quantifier-free formulae in our theories. Decidability of the SM T (CARD(T I ))-and SM T (CARDC(T I ))problems, at least in the relevant case where T I is any fragment of Presburger arithmetics, can be solved by reduction to the satisfiability problem for the so-called 'array-property fragment' of [5]: the reduction can be obtained by eliminating the wr, |−|, diff and Const symbols in favor of universally quantified formulae belonging to that fragment (see Lemmas 2,3,4). However, we now supply a decision procedure for quantifier-free formulae, since this will be useful for the interpolation algorithm in Section 7.…”

Section: Satisfiabilitymentioning

confidence: 99%

“…In this respect, there are two possible variants that can be considered: (i) the weak length |−| formalizes the minimal interval [0, | a|] of indexes outside which the array a is undefined (a can be undefined also in some location inside [0, | a|]); (ii) the (strong) length |−| represents the exact interval [0, |a|] where the array a is fully defined. Strong length is essential for the faithful logical formalization of benchmarks coming from software verification, such as C programs included in the SV-COMP competition [4].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

General Interpolation and Strong Amalgamation for Contiguous Arrays

Ghilardi¹,

Gianola²,

Kapur³

et al. 2022

Preprint

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Interpolation is an essential tool in software verification, where first-order theories are used to constrain datatypes manipulated by programs. In this paper, we introduce the datatype theory of contiguous arrays with maxdiff, where arrays are completely defined in their allocation memory and for which maxdiff returns the max index where they differ. This theory is strictly more expressive than the array theories previously studied. By showing via an algebraic analysis that its models strongly amalgamate, we prove that this theory admits quantifier-free interpolants and, notably, that interpolation transfers to theory combinations. Finally, we provide an algorithm that significantly improves the ones for related array theories: it relies on a polysize reduction to general interpolation in linear arithmetics, thus avoiding impractical full terms instantiations and unbounded loops.

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Section: Plan Of the Papermentioning

confidence: 99%

Section: Satisfiabilitymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

General Interpolation and Strong Amalgamation for Contiguous Arrays

Ghilardi¹,

Gianola²,

Kapur³

et al. 2022

Preprint

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show abstract

“…Witness Generation From Slices: VeriAbs stores slices in the form of separate C programs. To generate a valid witness from a slice it is critical to report the correct line numbers in the witness [5]. The slicer-analyzer maintains correct line numbers in the slice with respect to the original code by adding #line directives to it.…”

Section: Tool Enhancementsmentioning

confidence: 99%

VeriAbs: A Tool for Scalable Verification by Abstraction (Competition Contribution)

Darke

Agrawal

Venkatesh

2021

Tools and Algorithms for the Construction and Analysis of Systems

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VeriAbs is a strategy selection-based reachability verifier for C programs. The selection of a suitable strategy is from a pre-defined set of strategies and by taking into account the syntax and semantics of the code to be verified. This year we present VeriAbs version 1.4.1 in which a novel preprocessor to strategy selection is introduced. The preprocessor checks for the feasibility of performing a lightweight slicing of the input code using function call graph and variable reference information. By this if the program is found to be sliceable, sub-programs or slices are generated, and the known strategy selection algorithm of VeriAbs is applied to each slice. The verification results of each slice are then composed to derive that of the entire program. This compositional verification has improved the scalability of VeriAbs and presented in this paper.

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“…Today, software verification has reached industrial size code, and annual competitions on software verification [1] demonstrate the continuing progress. This success is due to recent advances in the software analysis techniques themselves as well as in the underlying SMT (Satisfiability modulo theories) solvers [2], [3].…”

Section: Introductionmentioning

confidence: 99%

Software/Hardware Co-Verification for Custom Instruction Set Processors

et al. 2021

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Verification of software and processor hardware usually proceeds separately, software analysis relying on the correctness of processors executing machine instructions. This assumption is valid as long as the software runs on standard CPUs that have been extensively validated and are in wide use. However, for processors exploiting custom instruction set extensions to meet performance and energy constraints the validation might be less extensive, challenging the correctness assumption. In this paper we present a novel formal approach for hardware/software co-verification targeting processors with custom instruction set extensions. We detail two different approaches for checking whether the hardware fulfills the requirements expected by the software analysis. The approaches are designed to explore a tradeoff between generality of the verification and computational effort. Then, we describe the integration of software and hardware analyses for both techniques and describe a fully automated tool chain implementing the approaches. Finally, we demonstrate and compare the two approaches on example source code with custom instructions, using state-of-the-art software analysis and hardware verification techniques.

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Software Verification: 10th Comparative Evaluation (SV-COMP 2021)

Cited by 51 publications

References 80 publications

General Interpolation and Strong Amalgamation for Contiguous Arrays

General Interpolation and Strong Amalgamation for Contiguous Arrays

VeriAbs: A Tool for Scalable Verification by Abstraction (Competition Contribution)

Software/Hardware Co-Verification for Custom Instruction Set Processors

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