Flip chip solder bumps were produced on various bump pad dimensions by electroplating to investigate their current efficiency. The bump pad dimensions range from 60 ϫ 60 m to 250 ϫ 250 m. Bump heights are in the range of 80-150 m. The bump height achieved is very uniform across a 4 in. wafer. The growth of bump height follows a parabolic trend with respect to plating time. Experimental results showed that the cathode current efficiency increases with increasing pad size. The cathode current efficiency also increases with respect to plating time and approaches a constant level after 30 min of deposition.The manufacture of solder bumps is an important step in flipchip bonding technology. A solder bump structure consists of under bump metallurgy ͑UBM͒ and the top solder mass. The UBM can be produced by sputtering deposition, for instance, TiW/Cu, Cr/Cu, 1,2 or by electroless deposition for the electroless nickel deposit. 3-5 Processes available for producing the top solder mass include evaporation deposition, stencil printing, and electroplating. In principle, these processes can all apply to the same UBM combinations, although each commercial process does have its characteristic structure.Electroplating is by far the most feasible process for enabling the production of a fine pitch bump pattern. Electroplating of solder bump is conducted in a rather complicated condition in which there could be thousands of tiny cathodes, the bump pad. The current distribution among the tiny cathodes determines the solder mass plated and thus the bump height uniformity. Bump height uniformity is of importance and is strictly required for achieving satisfactory bonding. The solder bump height uniformity can be monitored by the appropriate design of the electroplating cell. 6 In addition to bump height uniformity, for application purposes the cathode current efficiency is also of importance. A high cathode current efficiency is certainly preferable in light of cost concerns. There has been no discussion of the cathode current efficiency issue in the electroplating of solder bump. This present work investigated the variation of cathode current efficiency with respect to solder bump pad dimensions and bump pattern designs.
ExperimentalThe solder bump was produced on a Si wafer. The Si wafer was precleaned by degreasing sequentially with trichloroethylene, acetone, and isopropanol, followed by deoxidizing in a 10% HF solution. The production sequence of the solder bump is presented in the flow diagram as shown in Fig. 1. The cleaned Si wafer was deposited sequentially with the multiplayer of Ta/TaCu/Cu using magnetron sputter deposition. The thickness of each layer is around 500 nm. On top of the Cu layer was deposited an electroless nickel ͑EN͒ deposit of 5 m in thickness. A layer, 30 m thick, of positive photoresist was spin-coated on the Cu surface. The Cu pad produced after developing was then etched with a HNO 3 solution prior to electroless Ni deposition. The electroless nickel solution 7 consists of 87 g/L NiSO 4 •6H 2 O, 24 g/L ...
