Some new results on binary polynomial multiplication

Cenk, Murat; Hasan, M.A.

doi:10.1007/s13389-015-0101-6

Cited by 15 publications

(26 citation statements)

References 24 publications

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“…Bernstein has a circuit with depth 9 and 256 gates. Our techniques, starting with the straight-line program given on his homepage http://binary.cr.yp.to/m.html, gave depth 8 and 255 gates, which is the same result obtained by Cenk and Hasan [6]. We have no reason to believe that RAND-GREEDY-ALG would not produce similar results for computing the products of binary polynomials of other degrees, but did not pursue this since it did not seem to reduce the number of gates.…”

Section: Circuitssupporting

confidence: 83%

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Small low-depth circuits for cryptographic applications

2018

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We present techniques to obtain small circuits which also have low depth. The techniques apply to typical cryptographic functions, as these are often specified over the field GF (2), and they produce circuits containing only AND, XOR and XNOR gates. The emphasis is on the linear components (those portions containing no AND gates). A new heuristic, DCLO (for depth-constrained linear optimization), is used to create small linear circuits given depth constraints. DCLO is repeatedly used in a See-Saw method, alternating between optimizing the upper linear component and the lower linear component. The depth constraints specify both the depth at which each input arrives and restrictions on the depth for each output. We apply our techniques to cryptographic functions, obtaining new results for the S-Box of the Advanced Encryption Standard, for multiplication of binary polynomials, and for multiplication in finite fields. Additionally, we constructed a 16-bit S-Box using inversion in GF (216) which may be significantly smaller than alternatives.

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Section: Circuitssupporting

confidence: 83%

“…Running RAND-GREEDY-ALG on the lower linear component of that circuit, we obtained the same size as Bernstein with 155 gates, but reduced the depth from 9 to 6. Cenk and Hasan [6] report the same number of gates, but depth 8. Find and Peralta [8] report size 154 and depth 9, but have a different nonlinear component.…”

Section: Circuitsmentioning

confidence: 99%

Small low-depth circuits for cryptographic applications

2018

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“…For k = 4, 5, 6, 7 we improve on the recurrences for Karatsuba-like multiplication. We obtain smaller circuits than the previously known best bounds (see Cenk and Hasan [4] and Bernstein [1]) for almost all cryptographically relevant values of n . Table 5 in Section 6 shows circuit sizes and depths for a range of n .…”

Section: Introductionmentioning

confidence: 70%

Better Circuits for Binary Polynomial Multiplication

Peralta

2019

IEEE Trans. Comput.

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We develop a new and simple way to describe Karatsuba-like algorithms for multiplication of polynomials over double-struckF2. We restrict the search of small circuits to a class of circuits we call symmetric bilinear. These are circuits in which AND gates only compute functions of the form ∑i∈Sai⋅∑i∈Sbi (S ⊆ {0,…, n − 1}). These techniques yield improved recurrences for M(kn), the number of gates used in a circuit that multiplies two kn-term polynomials, for k = 4, 5, 6, and 7. We built and verified the circuits for n-term binary polynomial multiplication for values of n of practical interest. Circuits for n up to 100 are posted at http://cs-www.cs.yale.edu/homes/peralta/CircuitStuff/BinPolMult.tar.gz.

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“…[Ber09] set the record for polynomial size up to 1000 in 2009. [CH15] improve the results up to 4.5% for certain size of polynomial. Since our Frobenius Additive FFT works with IFAFFT(k, A, l, α) :…”

Section: Multiplications Of F 2 [X] Of Small Degreementioning

confidence: 81%

“…The record of minimal bit-operation to multiply polynomial over F 2 [x] was set by [Ber09] and [CH15], which are both based on Karatsuba-like algorithm. Instead of Karatsuba-like algorithm, we use Frobenius additive FFT to perform multiplication in F 2 [x].…”

Section: Multiplications Of F 2 [X] Of Small Degreementioning

confidence: 99%

Frobenius Additive Fast Fourier Transform

Chen

Kuo

et al. 2018

Proceedings of the 2018 ACM International Symposium on Symbolic and Algebraic Computation

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In ISSAC 2017, van der Hoeven and Larrieu showed that evaluating a polynomial P ∈ F q [x] of degree < n at all n-th roots of unity in F q d can essentially be computed d-time faster than evaluating Q ∈ F q d [x] at all these roots, assuming F q d contains a primitive n-th root of unity [vdHL17a]. Termed the Frobenius FFT, this discovery has a profound impact on polynomial multiplication, especially for multiplying binary polynomials, which finds ample application in coding theory and cryptography. In this paper, we show that the theory of Frobenius FFT beautifully generalizes to a class of additive FFT developed by Cantor and Gao-Mateer [Can89, GM10]. Furthermore, we demonstrate the power of Frobenius additive FFT for q = 2: to multiply two binary polynomials whose product is of degree < 256, the new technique requires only 29,005 bit operations, while the best result previously reported was 33,397. To the best of our knowledge, this is the first time that FFT-based multiplication outperforms Karatsuba and the like at such a low degree in terms of bit-operation count. CCS CONCEPTS• Mathematics of computing → Computations in finite fields; KEYWORDS addtitive FFT, Frobenius FFT, polynomial multiplication

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Some new results on binary polynomial multiplication

Cited by 15 publications

References 24 publications

Small low-depth circuits for cryptographic applications

Small low-depth circuits for cryptographic applications

Better Circuits for Binary Polynomial Multiplication

Frobenius Additive Fast Fourier Transform

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