Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part II: Multiplication and Algebraic Functions

Abstract

We construct arithmetic modules for signal processing with sigma-delta modulated signal form which has advantage in signal quality over other pulsed signal forms. In the second part of this paper, multi-input multipliers are presented first. Secondly, dividers and square root function modules with the multiplier on their internal feedback path are constructed. Combined use of the multipliers, dividers, and the square root functions creates various algebraic functions including polynomial and rational functions. Only two bit-manipulations, bit-permutation with sorting networks and bit-reversal with NOT gates, have built up all the algebraic operations on any form of SD modulated signals. These modules, together with transcendental functions presented in the first part of this paper, organize an extensive module library for the sigma-delta domain signal processing. The multiplier output contains noise components which originate from quantization. The noise power can decrease in exchange for circuit complexity. A time-division multiplexing technique based on N-tone sigma-delta modulation is applied to the multipliers for reducing the complexity. Signal processing circuits built of nanometer-scale quantum effect devices must be equipped with fault tolerance of transient device error. By computer simulation of a multiplier built of single-electron tunneling devices, we found that the multiplier decreased its output SNDR from 43 to 27dB at an OSR of as the device error rate increased from 0 to . However, the multiplier was never functionally failed during the simulation.

Sigma-delta domain bandpass and band-elimination wave filters

“…Then, the SD domain filters can be designed by using only three kinds of circuit cells, namely, UD cells, LTGs, and NOT gates. These circuit cells built of single-electron tunneling (SET) junctions [30,31] were designed in [9] by referring to [32][33][34]. Using the SET cells, we can design SET circuits of the SD domain filters.…”

“…From the architecture of SDSP circuits, it is expected that transient errors do not make SDSP circuits fail in operation and do not cause high surge noise at the outputs of the circuits [9]. We define fault tolerance of the SDSP circuits as these two persistences.…”

“…Sigma-delta domain signal processing (SDSP) is a scheme that allows quantum effect circuits to inherit analog circuit design properties and acquire tolerance of transient device errors [9]. The inheritance makes it possible to construct a wide range of SDSP circuit library including four arithmetic circuits [9][10][11][12], algebraic and transcendental function circuits [9,12,13], and piecewise linear circuits [14]. All of inputs, outputs, and internal signals of SDSP circuits are in sigma-delta (SD) modulated bit-stream form [15,16].…”

Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations

“…The error is assumed to be a probabilistic sequence with uniform distribution in , : quantization spacing, and has white spectrum. Then, the expectation of its frequency spectrum is given by (1) where is the rate of . When oversampling ratio (OSR) defined by (2) is doubled, the quantization noise power in the signal band,…”

“…We will see that some of these modules inherit ASP circuit techniques. Signal form adopted to the modules to be presented in Part I and the second part, Part II [1], of this paper is fully SD modulated bit-stream or a bundle of bit-streams representing multi-level SD modulated signals. Only two bit-manipulations, bit-permutation with sorting networks and bit-reversal with NOT gates, will build up all the arithmetic and functional operations on any form of SD modulated signals.…”