Specifying UML Protocol State Machines in Alloy

Abstract

A UML Protocol State Machine (PSM) is a behavioral diagram for the specification of the external behavior of a class, interface or component. PSMs have been used in the software development process for different purposes, such as requirements analysis and testing. However, like other UML diagrams, they are often difficult to validate and verify, specially when combined with other artifacts, such as Object Constraint Language (OCL) specifications. This drawback can be overcome by application of an off-the-shelf formal method, namely one supporting automatic validation and verification. Among those, we have the increasingly popular Alloy, based on a simple relational flavor of firstorder logic. This paper presents a model transformation from PSMs, optionally complemented with OCL specifications, to Alloy. Not only it enables automatic verification and validation of PSMs, but also a smooth integration of Alloy in current software development practices.

Specifying Semantic Interoperability between Heterogeneous Cloud Resources with the FCLOUDS Formal Language

“…To do so, Time is added at the end of each mutable field to represent the state concept. To be more specific, an operation op will be specified using a predicate: pred op[...,t,t':Time] ..., with two special parameters t and t' denoting, respectively, the pre-and post-states [12]. The core of each predicate is carried out by defining explicitly pre-and post-conditions, which are constraints that must be satisfied before executing the operation and after the operation is finished respectively.…”

A contractual approach for the verification of UML2.0 software architectures

“…For example, Luong et al (2012) and Lambolais et al (2009) propose to translate UML2.0 state machines towards an LTS specification verifiable by LOTOS tool. Garis et al (2012) propose to formalise a PSM in Alloy lightweight formal modelling language. Using Alloy analyser, this formalisation can be used to simulate and verify consistency between UML artefacts such as components.…”

Translating between Alloy specifications and UML class diagrams annotated with OCL

“…This allows us to support roundtrip scenarios such as the one presented in the previous section. It also enabled us to develop a translation of UML Protocol State Machines (PSMs) to Alloy [15], that allows us to simulate and verify the consistency between UML artifacts (PSM, CD and OCL) and to perform other V&V activities, such as detect unreachable states or invalid transitions. In that work, we first use the translation described here to map a UML+OCL model to the local state idiom in Alloy, and then map a PSM (optionally, also enriched with OCL) to a trace specification that captures the allowed behavior of a component.…”