Speedup and Parallelization Models for Energy-Efficient Many-Core Systems Using Performance Counters

Abstract

Traditional speedup models, such as Amdahls, facilitate the study of the impact of running parallel workloads on manycore systems. However, these models are typically based on software characteristics, assuming ideal hardware behaviors. As such, the applicability of these models for energy and/or performance-driven system optimization is limited by two factors. Firstly, speedup cannot be measured without instrumenting the original software codes, and secondly, the parallelization factor of an application running on specific hardware is generally unknown.In this paper, we propose a novel method, whereby standard performance counters found in modern many-core platforms can be used to derive speedup without instrumenting applications for time measurements. We postulate that speedup can be accurately estimated as a ratio of instructions per cycle for a parallel manycore system to the instructions per cycle of a single core system. By studying the application instructions and system instructions for the first time, our method leads to the determination of the parallelization factor and the optimal system configuration for energy and/or performance. The method is extensively demonstrated through experiments on three different platforms with core numbers ranging from 4 to 61, running parallel benchmark applications (including synthetic and PARSEC benchmarks) on Linux operating system. Speedup and parallelization estimations using our method and their extensive cross-validations show negligible errors (up to 8%) in these systems. Additionally, we demonstrate the effectiveness of our method to explore parallelization-aware energy-efficient system configurations for many-core systems using energy-delay-product based formulations.Index Terms-Many-core processors; speedup; performance counter, power normalized performance, energy-delay-product.• Extend Amdahl's speedup model considering applications and system software related overhead separately.• Propose a new method to model parallelization and speedup via performance counters to avoid the need for instrumenting applications. We show that speedup can be accurately estimated as a ratio of instructions retired/executed per cycle of

Amdahl's law in the context of heterogeneous many‐core systems – a survey

“…The classical method for modelling the speedup of workload processing caused by some measure of improving the computation capabilities is known as Amdahl's law, which developed from observations presented by Amdahl in 1967 [1]. Amdahl [2,42] no p-fraction yes no no no no [3] no p-fraction yes yes yes yes no [5] load balancing and scheduling p-fraction yes yes yes yes no [7] no p-fraction yes yes yes no no [13] no parallelism yes yes no no no [14] load balancing and scheduling parallelism yes yes no no no [15] no p-fraction yes yes yes yes no [17] synchronisation and communication p-fraction yes yes no no no [18] no p-fraction yes no no no no [4,43] no p-fraction yes no no no no [19,20,44] no p-fraction yes no no no no [22] no p-fraction yes no no no no [24] no multi p-fraction and parallelism yes yes no no no [25] no p-fraction yes no no no no [26] time of parallel tasks no no no no no no [27] no p-fraction yes no no no no [28] no p-fraction yes no no no no [29] no no yes yes no no no [38] no [68] no p-fraction yes no no no no [69] run-time no no yes no no yes [70] run-time no no yes yes yes yes provide a mathematical formula for this law, which was later formulated based on his verbal arguments. Given the context of this paper, which is about the parallelisation of workloads on M/MCP systems, 'improvement of computation capabilities' generally means the incorporation of multiple processing units (to be called 'cores' in this paper) to improve the speed of workload execution, unless otherwise noted.…”

“…The model for speedup by scaling core speeds can be found in [30,Equation (5)]. In this multi-fraction model following Cassidy and Andreou [37], the execution time of each parallel phase is calculated according to a similar method to that shown in (15), which is generally correct for all schemes of a task to core allocation. The modelling does not make assumptions on the parallelism of each parallel phase or the number of cores available for each parallel phase, but the assumption of sequential plus parallel phases is fully within the descriptive power of dags of the type found in Fig.…”

“…In this paper, the mathematical forms, including variable names and formulas, follow a consistent presentation standard. Formulas [14] yes no no no yes no no no no yes yes [15] yes no no yes yes no no no no yes yes [17] yes no no yes yes yes no no no yes yes [18] yes no no yes yes yes yes no no yes no [4,43] yes no no yes yes yes yes no no yes no [19,20,44] yes no no yes yes yes no no yes yes yes [22] yes yes no no yes no no no no yes no [24] yes no no yes yes yes no no no yes no [25] yes no no yes yes yes no no no yes yes [26] yes no no no no no no no no yes yes [27] yes no no no yes no no no no yes yes [28] yes that are derived, adopted, or adapted from the literature may have been transformed to conform with this standard presentation.…”

“…those integrated onto single chips, have, in general, moved towards multi‐/many‐core processors (M/MCPs) from single‐core structures, with the trend predicted to further develop [12]. In general, M/MCP may be configured into homogeneous MCP (HoMCP), where all of the cores are of the same type, as seen in Intel Core‐i and Xeon processors [13–16], or heterogeneous MCP (HeMCP), where the cores are different, as seen in ARM big.LITTLE [3–5, 17, 18]. HeMCP may incorporate diverse architectures of processing units such as CPU, GPU, DSP and embedded FPGA, as well as complex cache memory and communication facilities [5, 19–21].…”

“…The main topic of this review is the property of speedup and its relationship with system improvements/enhancements in the sense of increasing the number of processing units (cores). Energy/power models for these kinds of systems related to speedup models and making use of speedup and energy/power models for system optimisation will only be touched upon [15, 27, 30, 36, 39] but not treated as main topics of discussion. Other related topics, such as the roofline modelling method [40], modelling speedup caused by improvement techniques not related to parallelisation [30], and using Amdahl's law to model the improvements of parameters other than speedup [41] are likewise not discussed in detail.…”