Spike-time-dependent plasticity rule in memristor models for circuit design

Elhamdaoui, Mouna; Rziga, Faten Ouaja; Mbarek, Khaoula; Besbes, Kamel

doi:10.1007/s10825-022-01895-9

Cited by 5 publications

(3 citation statements)

References 28 publications

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“…In STDP learning of an artificial synapse device, the synaptic weight can be regulated by the overlap of voltage signals applied to both ends of the synapse devices (Figure 1a) [16][17][18]. When the spike is applied to the sample, the post-spike applied to the bottom electrode takes on an inverted version of the pre-spike shape.…”

Section: Resultsmentioning

confidence: 99%

Spike Optimization to Improve Properties of Ferroelectric Tunnel Junction Synaptic Devices for Neuromorphic Computing System Applications

Byun,

Kho,

Hwang

et al. 2023

Nanomaterials

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The continuous advancement of Artificial Intelligence (AI) technology depends on the efficient processing of unstructured data, encompassing text, speech, and video. Traditional serial computing systems based on the von Neumann architecture, employed in information and communication technology development for decades, are not suitable for the concurrent processing of massive unstructured data tasks with relatively low-level operations. As a result, there arises a pressing need to develop novel parallel computing systems. Recently, there has been a burgeoning interest among developers in emulating the intricate operations of the human brain, which efficiently processes vast datasets with remarkable energy efficiency. This has led to the proposal of neuromorphic computing systems. Of these, Spiking Neural Networks (SNNs), designed to closely resemble the information processing mechanisms of biological neural networks, are subjects of intense research activity. Nevertheless, a comprehensive investigation into the relationship between spike shapes and Spike-Timing-Dependent Plasticity (STDP) to ensure efficient synaptic behavior remains insufficiently explored. In this study, we systematically explore various input spike types to optimize the resistive memory characteristics of Hafnium-based Ferroelectric Tunnel Junction (FTJ) devices. Among the various spike shapes investigated, the square-triangle (RT) spike exhibited good linearity and symmetry, and a wide range of weight values could be realized depending on the offset of the RT spike. These results indicate that the spike shape serves as a crucial indicator in the alteration of synaptic connections, representing the strength of the signals.

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Section: Resultsmentioning

confidence: 99%

Spike Optimization to Improve Properties of Ferroelectric Tunnel Junction Synaptic Devices for Neuromorphic Computing System Applications

Byun,

Kho,

Hwang

et al. 2023

Nanomaterials

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“…Synapses in Truenorth, Loihi, Darwin, Neurogrid, and ROLLS are generally realized through weight update circuits or weight memory. Most of them only support offline learning, with the exception of Loihi, which allows online learning of spike-time-dependent plasticity (STDP) rules [4,10]. Tianjic's synapse is implemented using a crossbar-type amnestic blocker.…”

Section: Introductionmentioning

confidence: 99%

Python-Based Circuit Design for Fundamental Building Blocks of Spiking Neural Network

Qin

et al. 2023

Electronics

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Spiking neural networks (SNNs) are considered a crucial research direction to address the “storage wall” and “power wall” challenges faced by traditional artificial intelligence computing. However, developing SNN chips based on CMOS (complementary metal oxide semiconductor) circuits remains a challenge. Although memristor process technology is the best alternative to synapses, it is still undergoing refinement. In this study, a novel approach is proposed that employs tools to automatically generate HDL (hardware description language) code for constructing neuron and memristor circuits after using Python to describe the neuron and memristor models. Based on this approach, HR (Hindmash–Rose), LIF (leaky integrate-and-fire), and IZ (Izhikevich) neuron circuits, as well as HP, EG (enhanced generalized), and TB (the behavioral threshold bipolar) memristor circuits are designed to construct the most basic connection of a SNN: the neuron–memristor–neuron circuit that satisfies the STDP (spike-timing-dependent-plasticity) learning rule. Through simulation experiments and FPGA (field programmable gate array) prototype verification, it is confirmed that the IZ and LIF circuits are suitable as neurons in SNNs, while the X variables of the EG memristor model serve as characteristic synaptic weights. The EG memristor circuits best satisfy the STDP learning rule and are suitable as synapses in SNNs. In comparison to previous works on hardware spiking neurons, the proposed method needed fewer area resources for creating spiking neurons models on FPGA. The proposed SNN basic components design method, and the resulting circuits, are beneficial for architectural exploration and hardware–software co-design of SNN chips.

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“…1) The memristor 2,3) is reckoned as a competitive candidate for new memory that could bring conventional computers to a new era of brain-like architecture. 4) Research has been dedicate to realize neuromorphic [5][6][7][8][9][10][11] or computing [12][13][14][15][16][17] applications in memristors. However, there are still some problems with such memory technology.…”

mentioning

confidence: 99%

Dependence of Ta₂O₅ memristor storage and synaptic performances on oxygen content

Liu

Wang

Shan

et al. 2023

Appl. Phys. Express

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In order to meet the exponentially increased demand for data processing, researchers are exploring memristors to emulate synapse or in-memory computing. To further enhance its performance, the impact of oxygen content on storage and synaptic performances are investigated based on Ag/TaxOy/ITO memristors. Conductive filament dominated mechanism with two kinds of ions is validated by multiple methods. By optimizing oxygen content, synaptic weight modulation ability increased almost 7 folds. Additionally, Boolean logic operations are implemented with >10000 switching cycles and in-situ stored more than 10000s. Our work lays the foundation of optimizing memory storage and neuromorphic performances on future in-memory computing.

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Spike-time-dependent plasticity rule in memristor models for circuit design

Cited by 5 publications

References 28 publications

Spike Optimization to Improve Properties of Ferroelectric Tunnel Junction Synaptic Devices for Neuromorphic Computing System Applications

Spike Optimization to Improve Properties of Ferroelectric Tunnel Junction Synaptic Devices for Neuromorphic Computing System Applications

Python-Based Circuit Design for Fundamental Building Blocks of Spiking Neural Network

Dependence of Ta₂O₅ memristor storage and synaptic performances on oxygen content

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Spike-time-dependent plasticity rule in memristor models for circuit design

Cited by 5 publications

References 28 publications

Spike Optimization to Improve Properties of Ferroelectric Tunnel Junction Synaptic Devices for Neuromorphic Computing System Applications

Spike Optimization to Improve Properties of Ferroelectric Tunnel Junction Synaptic Devices for Neuromorphic Computing System Applications

Python-Based Circuit Design for Fundamental Building Blocks of Spiking Neural Network

Dependence of Ta2O5 memristor storage and synaptic performances on oxygen content

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Dependence of Ta₂O₅ memristor storage and synaptic performances on oxygen content