Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)
DOI: 10.1109/iitc.2004.1345721
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Spin-on dielectric stack low-k integration with EB curing technology for 45nm-node and beyond

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Cited by 5 publications
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“…Measurement of residual stresses in Cu wiring.-The residual stresses of Cu wiring with the Cu/LKD structures were detected by X-ray diffraction ͑XRD͒. 11 Two Cu/LKD samples of the same type as those evaluated in previous reports 5 were measured. One consisted of a stacked structure of 100 nm thick dense low-k film ͑LKD2040͒ and 200 nm thick porous low-k film ͑LKD5117͒, and the other consisted of a single layer of 300 nm thick dense low-k film ͑LKD2040͒.…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…Measurement of residual stresses in Cu wiring.-The residual stresses of Cu wiring with the Cu/LKD structures were detected by X-ray diffraction ͑XRD͒. 11 Two Cu/LKD samples of the same type as those evaluated in previous reports 5 were measured. One consisted of a stacked structure of 100 nm thick dense low-k film ͑LKD2040͒ and 200 nm thick porous low-k film ͑LKD5117͒, and the other consisted of a single layer of 300 nm thick dense low-k film ͑LKD2040͒.…”
Section: Methodsmentioning
confidence: 99%
“…Additionally, some of the defects induced during CMP had been previously unreported. Nagai et al 5 reported that a porous low-k film ͓modulus = 7.0 Gpa; LKD5117; the LKD series consists of spin-on ͑MSQ͒ films from the JSR Corporation͔ stacked with a dense low-k film ͑15 GPa; LKD2040͒ showed pronounced cracking in its Cu wiring that might have been related to interlayer dielectric ͑ILD͒ mechanical strength. They also reported that cracking decreased with another stacked structure of a porous low-k film having a higher Young's modulus, coupled with modification to the ashing process.…”
mentioning
confidence: 99%
“…Moreover, porous low-k materials are required for the construction of advanced 65-nm-node and 45-nmnode LSI devices. 1) However, the extremely low Young's modulus values of these materials result in a significant number of defects, 2,3) thus preventing the use of these materials in the construction of LSI devices. Some defects induced in chemical mechanical planarization (CMP) with a Cu/porous low-k structure have not been previously reported.…”
Section: Introductionmentioning
confidence: 99%
“…However, the poor mechanical strength of low-k materials causes various defects, such as low-k delamination and damage to Cu interconnects, due to stress during chemical mechanical polishing (CMP) in the interconnect formation process. 1,2) It has been reported that the use of a low polishing pressure in the CMP process is effective for reducing these defects. 3) A number of approaches to low-downforce planarization have been studied.…”
Section: Introductionmentioning
confidence: 99%