Split-cost communication model for improved MPSoC application mapping

Odendahl, Maximilian; Castrillón, Jerónimo; Volevach, Vitaliy; Leupers, Rainer; Ascheid, Gerd

doi:10.1109/issoc.2013.6675280

Cited by 5 publications

(3 citation statements)

References 15 publications

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“…Additionally, the PEs can communicate over the L2 cache and over main memory. The model includes different communication libraries, which can have complex trade-offs depending on the token sizes and the amount of data transferred [23]. All experiments were conducted on a machine running Ubuntu Linux 15.10, with eight Intel®Core™i7-4790 CPU at 3.60 GHz and 32 GB of DDR3 memory at 1600 MHz.…”

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study

Goens¹,

Khasanov²,

Castrillón³

et al. 2016

2016 IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSOC)

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Software abstractions are crucial to effectively program heterogeneous Multi-Processor Systems on Chip (MPSoCs).Prime examples of such abstractions are Kahn Process Networks (KPNs) and execution traces. When modeling computation as a KPN, one of the key challenges is to obtain a good mapping, i.e., an assignment of logical computation and communication to physical resources. In this paper we compare two systemlevel frameworks for solving the mapping problem: Sesame and MAPS. These frameworks, while superficially similar, embody different approaches. Sesame, motivated by modeling and designspace exploration, uses evolutionary algorithms for mapping. MAPS, being a compiler framework, uses simple and fast heuristics instead. In this work we highlight the value of common abstractions, such as KPNs and traces, as a vehicle to enable comparisons between large independent frameworks. These types of comparisons are fundamental for advancing research in the area. At the same time, we illustrate how the lack of formalized models at the hardware level are an obstacle to achieving fair comparisons. Additionally, using a set of applications from the embedded systems domain, we observe that genetic algorithms tend to outperform heuristics by a factor between 1× and 5×, with notable exceptions. This performance comes at the cost of a longer computation time, between 0 and 2 orders of magnitude in our experiments.

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Section: Resultsmentioning

confidence: 99%

“…These cost functions are obtained from the platform's data sheets and by running benchmark applications. They can be relatively complex for real architectures, as shown in [23]. On the processor side, MAPS uses a list of functional units with supported operations, number of registers and other architectural parameters.…”

Section: B the Maps Frameworkmentioning

confidence: 99%

Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study

Goens¹,

Khasanov²,

Castrillón³

et al. 2016

2016 IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSOC)

Self Cite

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“…It features 4 ARM Cortex-A15 processing elements and 8 DSPs [4]. The model was adapted [21] from a model of the commercial state-of-art MPSoC compiler from the SLX Tool Suite and confirmed with measurements from hardware [38]. A schematic view of the architecture can be seen in Figure 13.…”

Section: Return To Stepmentioning

confidence: 99%

Symmetry in Software Synthesis

Goens

Siccha

Castrillón

2017

ACM Trans. Archit. Code Optim.

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With the surge of multi- and manycores, much research has focused on algorithms for mapping and scheduling on these complex platforms. Large classes of these algorithms face scalability problems. This is why diverse methods are commonly used for reducing the search space. While most such approaches leverage the inherent symmetry of architectures and applications, they do it in a problem-specific and intuitive way. However, intuitive approaches become impractical with growing hardware complexity, like Network-on-Chip interconnect or heterogeneous cores. In this paper, we present a formal framework that can determine the inherent symmetry of architectures and applications algorithmically and leverage these for problems in software synthesis. Our approach is based on the mathematical theory of groups and a generalization called inverse semigroups. We evaluate our approach in two state-of-the-art mapping frameworks. Even for the platforms with a handful of cores of today and moderate-size benchmarks, our approach consistently yields reductions of the overall execution time of algorithms, accelerating them by a factor up to 10 in our experiments, or improving the quality of the results.Comment: 31 pages, 18 figure

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