SRAM cell reliability degradations due to cell crosstalk

Bae, Jongsun; Baeg, Sanghyeon; Wen, Shi-Jie; Wong, Rick

doi:10.1109/iirw.2010.5706505

Cited by 1 publication

(3 citation statements)

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“…When cell-to-cell coupling capacitors belong to R(Potential Defect), larger crosstalks happen between cells and can degrade the quality of SRAM cells. For example, the drain current at the cell storage node accessed for read/write can be reduced due to the crosstalk to its neighbor cells and can reduce cell reliability such as VDD MIN [9], [23]. The NVS technique is proposed to detect the C CCP in potentially defective region.…”

Section: Potential Issues With Defective Cellmentioning

confidence: 99%

“…With the presence of defects, some cell coupling capacitor (C CCP ) defects between static random access memory (SRAM) cells should remain unknown after the manufacturing tests and are potential sources of failures. If not rejected by manufacturing tests, the undetected and defective C CCP may cause increased power consumption, delay, noise, and VDD MIN [9], [23]. Thus, such defects are the sources of low reliability and may be the cause of intermittent failures.…”

Section: Introductionmentioning

confidence: 97%

“…Researchers have previously conducted experiments to model and test such crosstalk issues [1]- [6], [35]- [37]. In addition, the crosstalk between adjacent cells was modeled in previous research works [7]- [9].…”

Section: Introductionmentioning

confidence: 99%

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Characterizing the Capacitive Crosstalk in SRAM Cells Using Negative Bit-Line Voltage Stress

Bae

Baeg

Park

2012

IEEE Trans. Instrum. Meas.

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The physical distance between adjacent memory cells is rapidly decreasing as memory density increases and technology geometry shrinks. As a result of the narrower distance, the capacitance between adjacent cells, which are referred to as the cell coupling capacitor (C CCP ), increases and behaves as the source of crosstalk. The crosstalk is further aggravated by increasing operational speeds. When the sizes of the C CCP are marginal, they may not be detected by normal test patterns but can appear when various stresses accumulate. When they are not detected in an early manufacturing stage, they become the source of intermittent failures. Creating a complex test environment is sometimes rejected at the expense of higher parts per million of a device. In this paper, a negative voltage stress is applied to bit lines to test and diagnose the issues from the marginal C CCP . The negative voltage level is closely correlated to the C CCP size, which implies that the proposed method can be used as a vehicle to diagnose the potential issues due to cell coupling capacitors. The simulation results demonstrated that the negative stress voltage can screen the cell coupling capacitors from a few femtofarads to tens of femtofarads in an experimental circuit. The proposed technique has been validated by test chip using 130-nm technology.Index Terms-Bit line, capacitive defect, cell coupling capacitor (C CCP ), crosstalk, memory, negative voltage stress (NVS).

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Section: Potential Issues With Defective Cellmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 97%