SRAM Cells for Embedded Systems

Singh, Jawar; Raj, Balwinder

doi:10.5772/37094

Cited by 3 publications

(1 citation statement)

References 29 publications

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“…On the other hand, effective utilization of SRAM memories for high performance applications suitable for 4G/5G communications and video processing application is also a challenging task. To achieve this objective transistor level modi cation of SRAM is also tried out in various research for high speed read and write operation [3]- [4].…”

Section: Introductionmentioning

confidence: 99%

Analysis of Different Transistor Sram Structures Using Different Technologies

2023

Preprint

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In recent years, the need for power efficient memory design has increased drastically. SRAM design is commonly used in network-on-chip and system-on-chip VLSI design for low power and high speed operation. For high speed processor design SRAM is mainly used in cache memories as it provides a direct interface with processing unit which is not possible using DRAM cells. In order to achieve area-delay-power trade off depending on the applications, various SRAM designs in transistor level is analyzed earlier. Some power gating SRAM design focuses on reducing the power consumption by adding sleep transistors. For some high-performance design SRAM works by performing the read and write operation separately with individual control signals. This proposed work focuses on analyzing various transistor SRAM structures used in various applications. This paper also evaluates various parameters such as power consumption and transistor count. All the design is formed using DSCH2 and simulations have been carried out on in different technologies using MICROWIND tool.

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Section: Introductionmentioning

confidence: 99%