Stack caching for interpreters

Ertl, M. Anton

doi:10.1145/207110.207165

Cited by 45 publications

(34 citation statements)

References 7 publications

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“…This is not surprising, given that more MOVEs are eliminated dynamically than statically (see figures 4,5), and thus there is more potential for intermediate values to be kept in registers in the frequently executed code.…”

Section: Local Data Memory Accessesmentioning

confidence: 97%

“…Many designers favour stack architectures since the location of operands is implicit in the stack pointer [5,6,19]. In contrast, the operands of register machine instructions must be specified explicitly.…”

Section: Motivationmentioning

confidence: 99%

“…Interpreter generators simplify construction and maintenance of interpreters and can allow automatic VM instruction combining [27] and stack optimizations [9]. Stack caching [5] is a general technique for storing the topmost elements of the stack in registers. Ertl and Gregg [7] showed that interpreters (especially those using switch dispatch) spend most of their time in branch mispredictions on modern desktop architectures.…”

Section: Related Workmentioning

confidence: 99%

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The case for virtual register machines

Davis

Beatty

Casey

et al. 2003

Proceedings of the 2003 Workshop on Interpreters, Virtual Machines and Emulators

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Virtual machines (VMs) are a popular target for language implementers. A longrunning question in the design of virtual machines has been whether stack or register architectures can be implemented more efficiently with an interpreter. Many designers favour stack architectures since the location of operands is implicit in the stack pointer. In contrast, the operands of register machine instructions must be specified explicitly. In this paper, we present a working system for translating stackbased Java virtual machine (JVM) code to a simple register code. We describe the translation process, the complicated parts of the JVM which make translation more difficult, and the optimisations needed to eliminate copy instructions. Experimental results show that a register format reduced the number of executed instructions by 34.88%, while increasing the number of bytecode loads by an average of 44.81%. Overall, this corresponds to an increase of 2.32 loads for each dispatch removed. We believe that the high cost of dispatches makes register machines attractive even at the cost of increased loads.

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Section: Local Data Memory Accessesmentioning

confidence: 97%

Section: Motivationmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

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The case for virtual register machines

Davis

Beatty

Casey

et al. 2003

Proceedings of the 2003 Workshop on Interpreters, Virtual Machines and Emulators

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“…Register Caching: A popular optimization among stack based virtual machines is to cache the top value(s) of the stack in machine registers [8]. An equivalent approach to caching virtual registers in machine registers is to date un- established 1 .…”

Section: Scope For Optimizationmentioning

confidence: 99%

Dynamic interpretation for dynamic scripting languages

Williams

McCandless

Gregg

2010

Proceedings of the 8th Annual IEEE/ACM International Symposium on Code Generation and Optimization

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Dynamic scripting languages offer programmers increased flexibility by allowing properties of programs to be defined at run-time. Typically, program execution begins with an interpreter where type checks are implemented using conditional statements. Recent JIT compilers have begun removing run-time checks by specializing native code to program properties discovered at JIT time.This paper presents a novel intermediate representation for scripting languages that explicitly encodes types of variables. The dynamic representation is a flow graph, where each node is a specialized virtual instruction and each edge directs program flow based on control and type changes in the program. The interpreter thus performs specialized execution of whole programs. We present techniques for the efficient interpretation of our representation showing speedups of greater than 2x over static interpretation, with an average speedup of approximately 1.3x. MotivationScripting language virtual machines (VMs) typically compile high-level source code into an array of low-level opcodes (bytecodes). They then use a standard interpretation loop to execute the array of opcodes. Run-time type checks are implemented with either conditional statements or switch statements. Performing these type checks forms a significant portion of program execution. These costs seem unnecessary especially when we realize the same variable types are inevitably rechecked as loop iterations repeat the execution of the same block of code.Recent research has shown the advantages of type specialization in JIT compilation [19,10]. However, little research exists on the specialization of interpreters for scripting languages. We propose a scripting language representation and interpretation technique that performs specialized execution of dynamic code. We present a dynamic intermediate representation (DIR) which explicitly encodes the types of variables at each point of execution. The DIR is a flow graph, where each node is a specialized virtual instruction and each edge directs program flow based on control and type changes in the program. The proposed DIR therefore has a specialized path in the graph for every sequence of control and type changes found during execution.In this paper we present the initial development of our prototype implementation in the Lua Virtual Machine [12,13]. We present the design of our dynamic representation as well as the techniques used for its efficient interpretation. We illustrate our representation with a motivating example and present our plans for future interpreter optimizations. We compare the interpretation of our representation to the standard Lua implementation and show early speedups reaching a max of 2.13x and an average of 1.3x. We present reductions in the total number of instructions executed including reductions in conditional branches (used in interpreter type checking) as well as decreases in data and instruction cache accesses.

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“…Unlike in previously published stack caching techniques [14], the primary goal of stack caching for us is to reduce the dependence height in the execute part of the bytecode and not to reduce the number of operations. Unlike [14], we do not maintain how many cache elements are valid by means of interpreter state. In our case, tos contains valid data when there is at least one element on the stack, and nos contains valid data when there are at least two elements on the stack.…”

Section: Stack Cachingmentioning

confidence: 99%

Pipelined Java Virtual Machine Interpreters

Hoogerbrugge

Augusteijn

Lecture Notes in Computer Science

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Abstract. The performance of a Java Virtual Machine (JVM) interpreter running on a very long instruction word (VLIW) processor can be improved by means of pipelining. While one bytecode is in its execute stage, the next bytecode is in its decode stage, and the next bytecode is in its fetch stage. The paper describes how we implemented threading and pipelining by rewriting the source code of the interpreter and several modifications in the compiler. Experiments for evaluating the effectiveness of pipelining are described. Pipelining improves the execution speed of a threaded interpreter by 19.4% in terms of instruction count and 14.4% in terms of cycle count. Most of the simple bytecodes, like additions and multiplications, execute in four cycles. This number corresponds to the branch latency of our target VLIW processor. Thus most of the code of the interpreter is executed in branch delay slots.

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Stack caching for interpreters

Cited by 45 publications

References 7 publications

The case for virtual register machines

The case for virtual register machines

Dynamic interpretation for dynamic scripting languages

Pipelined Java Virtual Machine Interpreters

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