Start-up time of CMOS oscillators

Rusznyak, A.

doi:10.1109/tcs.1987.1086137

Cited by 45 publications

(16 citation statements)

References 1 publication

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“…The most widely used crystal oscillator architecture is the Pierce oscillator [13, 22], shown in Fig. 6 a .…”

Section: Application Of the Power Generation Methods For Off‐chip Crysmentioning

confidence: 99%

“…The power generation method can be extended for different oscillator architectures. Therefore, this method enables a design oriented analysis of different oscillators by eliminating the need of a complicated analysis as in [13] or multiple SpectreRF based simulations.…”

Section: Introductionmentioning

confidence: 99%

“…This inductor complicates the analysis of enhanced swing oscillators. An accurate start‐up time analysis has been reported in [13] for some oscillator architectures, but the approach is mathematically complex and not easily applicable to low voltage, enhanced swing oscillators. A start‐up analysis with a small‐signal model is typically used for oscillators [14, 15].…”

Section: Introductionmentioning

confidence: 99%

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Fast start‐up analysis of resonator based oscillators using a power generation method

Roy¹,

Mayaram²,

Fiez

2016

IET Circuits, Devices & Systems

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A power generation method based fast start-up analysis of resonator based oscillators is presented. The power generation analysis uses a small-signal two-port based approach and is design oriented. The analysis has been validated with detailed circuit level simulations. Several metal-oxide-semiconductor field-effect transistor oscillator architectures have been analysed and the start-up times compared using this analysis.

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“…The most widely used crystal oscillator architecture is the Pierce oscillator [13, 22], shown in Fig. 6 a .…”

Section: Application Of the Power Generation Methods For Off‐chip Crysmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Fast start‐up analysis of resonator based oscillators using a power generation method

Roy¹,

Mayaram²,

Fiez

2016

IET Circuits, Devices & Systems

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“…Upon amplifier turn-on, a loop gain greater than unity produces oscillation growth, modeled in the small-signal regime by an exponential with time constant [32]…”

Section: E Oscillation Startupmentioning

confidence: 99%

Low-Power MEMS-Based Pierce Oscillator Using a 61-MHz Capacitive-Gap Disk Resonator

Naing

Rocheleau

Alon

et al. 2020

IEEE Trans. Ultrason., Ferroelect., Freq. Contr.

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A 61-MHz Pierce oscillator constructed in 0.35-µm CMOS technology and referenced to a polysilicon surface-micromachined capacitive-gap-transduced wineglass disk resonator has achieved phase noise marks of −119 dBc/Hz at 1-kHz offset and −139 dBc/Hz at far-fromcarrier offsets. When divided down to 13 MHz, this corresponds to −132 dBc/Hz at 1-kHz offset from the carrier and −152 dBc/Hz far-from-carrier, sufficient for mobile phone reference oscillator applications, using a single MEMS resonator, i.e., without the need to array multiple resonators. Key to achieving these marks is a Pierce-based circuit design that harnesses a MEMS-enabled input-to-output shunt capacitance more than 100× smaller than exhibited by macroscopic quartz crystals to enable enough negative resistance to instigate and sustain oscillation while consuming only 78 µW of power-a reduction of ∼4.5× over previous work. Increasing the bias voltage of the resonator by 1.25 V further reduces power consumption to 43 µW at the cost of only a few decibels in far-from-carrier phase noise. This oscillator achieves a 1-kHz-offset figure of merit (FOM) of −231 dB, which is now the best among published chipscale oscillators to date. A complete linear circuit analysis quantifies the influence of resonator input-to-output shunt capacitance on power consumption and predicts further reductions in power consumption via reduction of electrode-to-resonator transducer gaps and bond pad sizes. The demonstrated phase noise and power consumption posted by this tiny MEMS-based oscillator are attractive as potential enablers for low-power "set-and-forget" autonomous sensor networks and embedded radios.

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“…While in [7] is shown how to neglect parasitic elements in a van der Pol Oscillator, we demonstrate that a singularity can be an important design part of a high dimensional oscillatory circuit, is usable for reduced order modeling. Thus, we model the start-up behavior of sinusoidal oscillators, which is described in [8][9][10]. Through this we are able to analyze high dimensional oscillators like the fourth-order Clapp oscillator.…”

Section: Introductionmentioning

confidence: 99%

On the Start-Up Behavior and Steady-State Oscillation of Singularly Perturbed Harmonic Oscillators

Prochaska

Mathis

2006

Nonlinear Dyn

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In this paper we present an analytic methodology for the analysis of a class of electrical harmonic oscillators. We combine geometric methods with the theory of singularly perturbed systems, which we use as tool for reduced order modeling. So we are able to define an easy to use formula in order to reduce an oscillatory system to center manifold. Thus we get a model for the start-up behavior as well as for the steady-state oscillation of sinusoidal oscillators. Furthermore, we demonstrate our technique by means of the Clapp oscillator which is an important member of the Colpitts, Clapp and Pierce oscillator family.

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Start-up time of CMOS oscillators

Cited by 45 publications

References 1 publication

Fast start‐up analysis of resonator based oscillators using a power generation method

Fast start‐up analysis of resonator based oscillators using a power generation method

Low-Power MEMS-Based Pierce Oscillator Using a 61-MHz Capacitive-Gap Disk Resonator

On the Start-Up Behavior and Steady-State Oscillation of Singularly Perturbed Harmonic Oscillators

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