State and Role of Hydrogen in Amorphous Oxide Semiconductors

Hosono, Hideo; Kamiya, Toshio

doi:10.1002/9781119715641.ch7

Cited by 4 publications

(4 citation statements)

References 26 publications

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“…4,27,28 When the conduction band minimum (E CBM ) of an oxide semiconductor is lower than E(H + /H − ), such as amorphous indium−gallium− zinc oxide (a-IGZO), the hydrogen injected into the oxide ionizes to generate carrier electrons (e − ), and the resulting H + is stabilized in the form of OH, increasing the carrier concentration. 4,29,30 Consequently, the injection/implantation of hydrogen into AOS thin films contacting the electrode area has emerged as an effective method for the formation of a highly conductive oxide interlayer, thereby mitigating the contact resistance between AOSs and metal electrodes. Hydrogen plasma is a conventional approach to address contact issues, where H 2 is dissociated into H + and an electron, followed by the treatment of the exposed oxide surface, which forms a highly conductive contact interface.…”

Section: Introductionmentioning

confidence: 99%

“…Hydrogen is a crucial and influential element in oxide semiconductors during thin-film deposition and post-treatment. 4 Figure 1c provides a summary of the band-edge energy of various oxide semiconductor materials compared to the universal charge transition level of E(H + /H − ). 4,27,28 When the conduction band minimum (E CBM ) of an oxide semiconductor is lower than E(H + /H − ), such as amorphous indium−gallium− zinc oxide (a-IGZO), the hydrogen injected into the oxide ionizes to generate carrier electrons (e − ), and the resulting H + is stabilized in the form of OH, increasing the carrier concentration.…”

Section: Introductionmentioning

confidence: 99%

“…4 Figure 1c provides a summary of the band-edge energy of various oxide semiconductor materials compared to the universal charge transition level of E(H + /H − ). 4,27,28 When the conduction band minimum (E CBM ) of an oxide semiconductor is lower than E(H + /H − ), such as amorphous indium−gallium− zinc oxide (a-IGZO), the hydrogen injected into the oxide ionizes to generate carrier electrons (e − ), and the resulting H + is stabilized in the form of OH, increasing the carrier concentration. 4,29,30 Consequently, the injection/implantation of hydrogen into AOS thin films contacting the electrode area has emerged as an effective method for the formation of a highly conductive oxide interlayer, thereby mitigating the contact resistance between AOSs and metal electrodes.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Shi,

Tsuji,

Cho

et al. 2024

ACS Nano

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Amorphous oxide semiconductors (AOSs) with low off-currents and processing temperatures offer promising alternative materials for next-generation high-density memory devices. The complex vertical stacking process of memory devices significantly increases the probability of encountering internal contact issues. Conventional surface treatment methods developed for planar devices necessitate efficient approaches to eliminate contact issues at deep internal interfaces in the nanoscale complex structures of AOS devices. In this work, we report the pioneering use of palladium thin film as a high-efficiency active hydrogen transfer pathway from the outside to the internal contact interface via low-temperature postannealing in the H 2 atmosphere, and the formation of highly conductive metallic interlayer effectively solves the contact issues at the deeply buried interfaces in devices. The application of this method reduced the contact resistance of Pd electrodes/amorphous indium−gallium−zinc oxide (a-IGZO) thin-film by 2 orders of magnitude, and thereby the mobility of thin-film transistor was increased from 3.2 cm 2 V −1 s −1 to nearly 20 cm 2 V −1 s −1 , preserving an excellent bias stress stability. This technology has wide applicability for the solution of contact resistance issues in oxide semiconductor devices with complex architectures.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Shi,

Tsuji,

Cho

et al. 2024

ACS Nano

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“…The modeling approach described herein leverages accumulation‐mode TFT modeling efforts recently reported 2 and is applied to the analysis a 40 nm amorphous indium gallium zinc oxide (a‐IGZO) TFT 3 . Although the modeling approach developed herein is potentially applicable to the analysis and design of a wide variety of devices, including metal‐oxide‐semiconductor (MOS) capacitors, MOS field‐effect transistors (MOSFETs), TFTs, and so forth, amorphous oxide semiconductor (AOS) TFTs are selected as an exemplar of their use because AOS TFTs are currently of intense interest for flat‐panel display backplane applications 4–10 …”

Section: Introductionmentioning

confidence: 99%

Single‐layer thin‐film transistor analysis and design

Wager

2023

J Soc Info Display

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A set of direct current (DC) analytical equations is formulated for the analysis and design of a single‐layer thin‐film transistor (TFT). For a specified TFT structure, drain current is calculated as a function of drain and gate voltage (taking the source as ground) according to the Enz, Krummenacher, Vittoz (EKV) compact model. One model parameter function is required to implement this EKV‐based equation, that is, drift mobility as a function of gate voltage. Drift mobility is evaluated as a consequence of accumulation layer electrostatics assessment of the TFT structure specified. In order to implement the model, three semiconductor properties (low‐frequency (static) relative dielectric constant, free electron concentration, and maximum (no trapping) mobility), two structure properties (insulator capacitance density and TFT width‐to‐length ratio), and one physical operating parameter (temperature) must be specified. Optimal TFT mobility performance is achieved when the thickness of the semiconductor channel layer is constrained to be less than 2.22 times the channel layer Debye length such that “short‐base” TFT operation obtains. Additionally, higher mobility TFT performance is obtained by selecting a channel layer with a small electron effective mass, reducing channel layer trap density, reducing channel layer thickness, reducing the free electron concentration, and/or increasing gate capacitance density.

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Semiconductor Materials in Oxide Thin Film Transistor

2024

Oxide Thin Film Transistors

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State and Role of Hydrogen in Amorphous Oxide Semiconductors

Cited by 4 publications

References 26 publications

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway

Single‐layer thin‐film transistor analysis and design

Semiconductor Materials in Oxide Thin Film Transistor

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