State-of-the-art of the bond wire failure mechanism and power cycling lifetime in power electronics

Xie, Luhong; Deng, Erping; Shen, Yang; Zhang, Ying; Zhang, Yan; Wang, Yanhao; Huang, Yongzhang

doi:10.1016/j.microrel.2023.115060

Cited by 12 publications

(1 citation statement)

References 34 publications

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“…Heel cracking is the second failure mode, which comes from the thermo-mechanical stresses generated by heat transfer within the bond wire and the displacement between the two bond pads due to the overall CTE mismatch [43]. The failure modes of bond wires are related to their aspect ratios, and studies have indicated that bond wires with different aspect ratios have different failure modes [44]. They primarily affect the conduction current path; thus, the key characterization parameters are the on-state voltage (V dson ) and on-state resistance (R dson ).…”

Section: Main Failure Modes and Characterization Parametersmentioning

confidence: 99%

Failure Characterization of Discrete SiC MOSFETs under Forward Power Cycling Test

Huang,

Singh,

Liu

et al. 2024

Energies

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Silicon carbide (SiC)-based metal–oxide–semiconductor field-effect transistors (MOSFETs) hold promising application prospects in future high-capacity high-power converters due to their excellent electrothermal characteristics. However, as nascent power electronic devices, their long-term operational reliability lacks sufficient field data. The power cycling test is an important experimental method to assess packaging-related reliability. In order to obtain data closest to actual working conditions, forward power cycling is utilized to carry out SiC MOSFET degradation experiments. Due to the wide bandgap characteristics of SiC MOSFETs, the short-term drift of the threshold voltage is much more serious than that of silicon (Si)-based devices. Therefore, an offline threshold voltage measurement circuit is implemented during power cycling tests to minimize errors arising from this short-term drift. Different characterizations are performed based on power cycling tests, focused on measuring the on-state resistance, thermal impedance, and threshold voltage of the devices. The findings reveal that the primary failure mode under forward power cycling tests, with a maximum junction temperature of 130 ∘C, is bond-wire degradation. Conversely, the solder layer and gate oxide exhibit minimal degradation tendencies under these conditions.

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Section: Main Failure Modes and Characterization Parametersmentioning

confidence: 99%