Statistical BER Analysis of Wireline Links With Non-Binary Linear Block Codes Subject to DFE Error Propagation

Abstract

This paper presents a statistical model to accurately estimate post-FEC BER for high-speed wireline links using standard linear block codes, such as the RS(544,514,15) KP4 and RS(528,514,7) KR4 codes. A hierarchical approach is adopted to analyze the propagation of PAM-symbol and FEC-symbol errors through a two-layer Markov model. A series of techniques including state aggregation, time aggregation, state reduction, and dynamic programming are introduced making the time complexity to compute post-FEC BER below 10 −15 reasonable. Error bounds associated with each method are found. The efficiency of the proposed model allows it to handle a larger state space, more DFE taps, and more sophisticated linear block codes than prior work. A 4-PAM 60 Gb/s wireline transceiver fabricated in a 7 nm FinFET technology is used as a test vehicle to validate this model. Measured data with two different channels reveals that the statistical model can properly predict the post-FEC error floor with standard FEC codes. While this paper demonstrates the method for capturing DFE error propagation, the method is general and can be applied to model other communication systems having memory effects. Moreover, our proposed model can be easily extended to higher-level PAM schemes and other advanced equalizer architectures to assist in making architectural choices for wireline transceivers.

A Study of Discrete Multitone Modulation for Wireline Links Beyond 100 Gb/s

“…Furthermore, A FS and D FS represent the full-scale ranges of the DAC and ADC, respectively. We define the input backoff (IBO) factor at the transmitter and receiver, respectively, IBO DAC = 20 log 10 A FS u rms (3)…”

“…Although it may be tempting to simply apply more powerful forward error correction (FEC) to address the shortcoming, unfortunately DFEs have a propensity for error propagation. Thus, heavy reliance on DFEs can be problematic for FEC [10].…”

Pre-FEC and Post-FEC BER as Criteria for Optimizing Wireline Transceivers

“…Once we have computed the equalized channel response α(z), we calculate the probability density function (pdf) of the received samples rk at its output. These results are then applied to the statistical BER model proposed in [10] to obtain both the pre-FEC and post-FEC BER subject to the error propagation from the N-tap DFE in Fig. 1.…”

“…All m bit errors in each erred FEC symbol are corrected so long as the total number of FEC symbol errors does not exceed t. Hence, higher-order RS codes can correct longer error bursts and have therefore been specified, in part, to accommodate DFE error propagation. Error bursts can become much longer when DFE tap weights are large and/or alternating in sign [10]. Such burst errors can reduce the coding gain offered by popular FEC codes [6][11].…”

“…This paper presents an accurate and efficient methodology for finding the impact of wireline transceiver parameters, such as equalizer coefficients, on post-FEC BER. The methodology relies on a statistical model proposed in [10] to accurately estimate post-FEC BER for high-speed wireline links subject to DFE error propagation. Section II establishes a system-level wireline transceiver model to estimate BER considering continuous-time-linear equalizer (CTLE) noise shaping and FFE noise enhancement.…”