Statistical fault injection: Quantified error and confidence

Leveugle,; Calvez,; Maistri,; Vanhauwaert,

doi:10.1109/date.2009.5090716

Cited by 302 publications

(180 citation statements)

References 14 publications

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“…This method is 100% accurate but is resource-intensive. The computational time can be reduced by simulating a subset of fault stimuli chosen at random locations throughout the circuit, a widely used method known as statistical fault injection (SFI) (Ramachandran et al, 2008;Leveugle et al, 2009). The major drawback of SFI is that the decrease in computation is directly proportional to a decrease in accuracy.…”

Section: Statistical Fault Injectionmentioning

confidence: 99%

Impact of Logic Synthesis on Soft Error Rate of Digital Integrated Circuits

Limbrick

2012

2012 IEEE Computer Society Annual Symposium on VLSI

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Section: Statistical Fault Injectionmentioning

confidence: 99%

Impact of Logic Synthesis on Soft Error Rate of Digital Integrated Circuits

Limbrick

2012

2012 IEEE Computer Society Annual Symposium on VLSI

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“…We have chosen to inject 1100 faults per technique to evaluate the solution. The statistical significance of these faults can be calculated by leveraging the work done by Leveugle et al [17]. The calculation for our experimental setup shows that we need 96 fault injection trials for each benchmark to have a 10% margin of error and confidence level of 95%.…”

Section: Fault Injection Campaignmentioning

confidence: 99%

Low cost control flow protection using abstract control signatures

Khudia

Mahlke

2013

Proceedings of the 14th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems

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The continual trend of shrinking feature sizes and reducing voltage levels makes transistors faster and more efficient. However, it also makes them more susceptible to transient hardware faults. Transient faults due to high energy particle strikes or circuit crosstalk can corrupt the output of a program or cause it to crash. Previous studies have reported that as much as 70% of the transient faults disturb program control flow, making it critical to protect control flow. Traditional approaches employ signatures to check that every control flow transfer in a program is valid. While having high fault coverage, large performance overheads are introduced by such detailed checking. We propose a coarse-grain control flow checking method to detect transient faults in a cost effective way. Our software-only approach is centered on the principle of abstraction: control flow that exhibits simple run-time properties (e.g., proper path length) is almost always completely correct. Our solution targets off-theshelf commodity embedded systems to provide a low cost protection against transient faults. The proposed technique achieves its efficiency by simplifying signature calculations in each basic block and by performing checking at a coarse-grain level. The coarsegrain signature comparison points are obtained by the use of a region based analysis. In addition, we propose a technique to protect control flow transfers via call and return instructions to ensure all control flow is covered by our technique. Overall, our proposed technique has an average of 11% performance overhead in comparison to 75% performance overhead of previously proposed signature based techniques while maintaining approximately the same degree of fault coverage.

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“…To calculate the statistical significance of a given number of fault injection trials, we use the works of Leveugle et al [16]. We need 96 fault injection trials for each benchmark to have a 10% margin of error and confidence level of 95%.…”

Section: Fault Injection Frameworkmentioning

confidence: 99%

Efficient soft error protection for commodity embedded microprocessors using profile information

Khudia

Wright

Mahlke

2012

Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Syst

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Successive generations of processors use smaller transistors in the quest to make more powerful computing systems. It has been previously studied that smaller transistors make processors more susceptible to soft errors (transient faults caused by high energy particle strikes). Such errors can result in unexpected behavior and incorrect results. With smaller and cheaper transistors becoming pervasive in mainstream computing, it is necessary to protect these devices against soft errors; an increasing rate of faults necessitates the protection of applications running on commodity processors against soft errors. The existing methods of protecting against such faults generally have high area or performance overheads and thus are not directly applicable in the embedded design space. In order to protect against soft errors, the detection of these errors is a necessary first step so that a recovery can be triggered.To solve the problem of detecting soft errors cheaply, we propose a profiling-based software-only application analysis and transformation solution. The goal is to develop a low cost solution which can be deployed for off-the-shelf embedded processors. The solution works by intelligently duplicating instructions that are likely to affect the program output, and comparing results between original and duplicated instructions. The intelligence of our solution is garnered through the use of control flow, memory dependence, and value profiling to understand and exploit the common-case behavior of applications. Our solution is able to achieve 92% fault coverage with a 20% instruction overhead. This represents a 41% lower performance overhead than the best prior approaches with approximately the same fault coverage.

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Statistical fault injection: Quantified error and confidence

Cited by 302 publications

References 14 publications

Impact of Logic Synthesis on Soft Error Rate of Digital Integrated Circuits

Impact of Logic Synthesis on Soft Error Rate of Digital Integrated Circuits

Low cost control flow protection using abstract control signatures

Efficient soft error protection for commodity embedded microprocessors using profile information

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