Status and trends of silicon LDMOS base station PA technologies to go beyond 2.5 GHz applications

Rijs, F. van

doi:10.1109/rws.2008.4463430

Cited by 31 publications

(12 citation statements)

References 7 publications

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“…LDMOS discrete devices typically operate between 24 V and 50 V and can deliver up to 50 dBm of output power at 2 GHz. LDMOS devices are expected to be used up to 5 GHz [96]. A cross section of a typical discrete device structure is shown in Fig.…”

Section: High-breakdown Devices In Standard Cmos Processesmentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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Abstract-This paper reviews the design of watt-level integrated CMOS RF power amplifiers (PAs) and state-of-the-art results in the literature. To reach watt-level output power from a single-chip CMOS PA, two main strategies can be identified: use of high supply voltage, and use of matching and power combination. High supply voltage limits are closely related to device design in the fabrication process. However, the maximum operating voltage can be improved by amplifier class selection, circuit solutions, and process modifications or mask changes. High output power can also be reached by the use of on-chip matching and power combination, commonly using on-chip transformers. Reliability often sets the limits for the PA design, and PA degradation mechanisms are reviewed. A compilation of state-of-the-art published results for linear and switched wattlevel PAs, as well as a few fully integrated CMOS PAs, is presented and discussed.

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Section: High-breakdown Devices In Standard Cmos Processesmentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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“…The typical Q factor at 1 -2 GHz was about 10 for spiral inductors, on this kind of low resistivity substrate. The process generation can be tracked back to LDMOS development chart of 0.55 µ gate length [7] [8].…”

Section: Propused Ic Technology and Ic Designmentioning

confidence: 99%

RF Power Amplifier IC with Low Memory Effect, Reduced Low Frequency Gain Peak and Isolated Temperature Tracking Circuitry

Bagger

Olsson²

2008

2008 IEEE Compound Semiconductor Integrated Circuits Symposium

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A highly linear wideband power amplifier IC with low memory effect for W-CDMA applications is presented utilizing Si LDMOS process technology. The IC was optimized to reduce typical low frequency gain peak often observed in LDMOS power devices. Topology of the interstage matching contributes to reduction of the electrical memory effect to specification level of maximum 2 dB imbalance over power between upper and lower Adjacent Channel Power Ratio when using II-tone wideband modulated signal. The on-chip temperature compensation circuitry tracks the active device temperature characteristic without degradation of the linearity or worsens the memory effect. The measured gain of the IC was 28.5 dB and 3-dB bandwidth of 600 MHz around 2100 MHz was achieved. The IC attained -50 dBc ACPR at 5 W output power. At power level of 45 W and IMD3 = -30dBc (two-tone) the IC exhibited power densities in excess of 469 mW/mm, in which matching losses were included. The IC demonstrated state-of-the-art RF power performance in terms of good linearity, low memory effects, well-suppressed low frequency gain peak and temperature tracking without linearity and IMD balance degradation.

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“…Nevertheless, the high cost of those materials is approximately 15 times more than LDMOS materials, results in the less tends of depending on this technology, and also the LDMOS technologies have a high breakdown voltage and on the other hand provide a good output power, linearity and efficiency performance up to 3 GHz. Therefore, LDMOS is currently the leading technology for commercial base station power amplifier [2], [6]. The LDMOS PA design beyond 3 GHz is challenging because the of the LDMOS properties, which has a low cut-off frequency and large output capacitance.…”

Section: Introductionmentioning

confidence: 99%

“…The LDMOS PA design beyond 3 GHz is challenging because the of the LDMOS properties, which has a low cut-off frequency and large output capacitance. Nowadays, research efforts concentrate on limitation of these effects and on the implementation of optimized LDMOS device up to 3.8 GHz and beyond as reported in [2]- [3].…”

Section: Introductionmentioning

confidence: 99%

4 Watt, 45% bandwidth Si-LDMOS high linearity power amplifier for modern wireless communications systems

Arnous

Boeck

2012

2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)

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In this contribution, a Si-LDMOS transistor is used to design a power amplifier (PA) in a broad frequency band covering a number of modern wireless communications systems. The design, implementation, and experimental results of 4 W wideband Si-LDMOS PA are presented. A method based on source/load---pull characterization has been used to extract optimum source and load impedances over the desired bandwidth. Following this, a systematic approach to design wideband matching network is suggested. In the frequency band 1.7---2.7 GHz, 3.4 -4.0 W output power and 25 % drain efficiency were achieved. The 3 rd -order intermodulation distortion (IMD3) performance of the designed PA is evaluated by providing a twotone signal to the amplifier. At two-tone output power of 1 W, IMD3 of around -30 dBc was measured over the design band.

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Status and trends of silicon LDMOS base station PA technologies to go beyond 2.5 GHz applications

Cited by 31 publications

References 7 publications

A Review of Watt-Level CMOS RF Power Amplifiers

A Review of Watt-Level CMOS RF Power Amplifiers

RF Power Amplifier IC with Low Memory Effect, Reduced Low Frequency Gain Peak and Isolated Temperature Tracking Circuitry

4 Watt, 45% bandwidth Si-LDMOS high linearity power amplifier for modern wireless communications systems

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