1968
DOI: 10.1002/j.1538-7305.1968.tb00092.x
|View full text |Cite
|
Sign up to set email alerts
|

Step Stress Aging of Plated Wire Memories

Abstract: A rate of 0.3 failures per billion hours or less is desirable for memory components in large integrated arrays. This unusually stringent requirement complicates the determination of lifetime from accelerated aging studies. The value and limitations of step stress aging techniques are discussed in terms of experimental results obtained using plated wire memory arrays designed to withstand the high ambient temperatures required for accelerated aging. Step stress aging measurements alone are insufficient for conf… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Year Published

1969
1969
1971
1971

Publication Types

Select...
5

Relationship

0
5

Authors

Journals

citations
Cited by 7 publications
references
References 5 publications
0
0
0
Order By: Relevance