2009
DOI: 10.1145/1455229.1455244
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Straightforward construction of depth-size optimal, parallel prefix circuits with fan-out 2

Abstract: Prefix computation is used in various areas and is considered as a primitive operation. Parallel prefix circuits are parallel prefix algorithms on the combinational circuit model. The depth of a prefix circuit is a measure of its processing time; smaller depth implies faster computation. The size of a prefix circuit is the number of operation nodes in it. Smaller size implies less power consumption, less VLSI area, and less cost. A prefix circuit with n inputs is depth-size optimal if its depth plus size equal… Show more

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Cited by 2 publications
(6 citation statements)
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“…We need to keep the waist and depth equal, by making sure that the last element of the top sequence is 1 (and not zero). A recent paper, also by Lin, studies this problem, comparing the Lin and Liu construction to two others (Lin & Hung 2009). Note how each odd numbered wire has exactly one fanout on it, to the adjacent wire.…”
Section: The Notions Of Depth and Waist Size Optimalitymentioning
confidence: 99%
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“…We need to keep the waist and depth equal, by making sure that the last element of the top sequence is 1 (and not zero). A recent paper, also by Lin, studies this problem, comparing the Lin and Liu construction to two others (Lin & Hung 2009). Note how each odd numbered wire has exactly one fanout on it, to the adjacent wire.…”
Section: The Notions Of Depth and Waist Size Optimalitymentioning
confidence: 99%
“…The improvements for depths 10 and 11 are substantial. the recent paper by Lin et al (2009), which contains a good list of relevant references). Right at the limit, there seems to be only one choice of partition, but for narrower networks, it would be good to be able to consider a variety of choices and to choose using the measure function, completely Table 3.…”
Section: Search Based Generation Of Depth Size Optimal Networkmentioning
confidence: 99%
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