Stress and Refractive Index Control of SiO2 Thin Films for Suspended Waveguides

Wostbrock, Neal; Busani, Tito

doi:10.3390/nano10112105

Cited by 7 publications

(4 citation statements)

References 29 publications

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“…In light of these comprehensive results and analyses, we have determined that the optimal parameters for the cladding are a refractive index of 1.465, a width of 14 μm, and a thickness of 7 μm. It's noteworthy that the cladding's refractive index only slightly exceeds that of the buried oxide by 0.007, a difference easily achievable by fine-tuning the deposition conditions of silicon oxide, including temperature, variety, ratio, and gas mixture flow rate, as outlined in previous research 6 .…”

Section: Design Of the Claddingmentioning

confidence: 95%

CMOS-compatible low-loss three-etching silicon O-band edge coupler with elaborate cladding and taper shape designs

Wang,

Zhang,

Wang

et al. 2023

Optoelectronic Devices and Integration XII

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O-band edge couplers exhibit significant promise in silicon-based optoelectronic chips, particularly for applications within data centers. However, the task of designing a low-loss O-band silicon edge coupler with a wider minimum width, capable of interfacing with standard single mode fibers (SMF), presents greater challenges compared to its C-band counterpart. In this work, we propose, design and simulate a three-etching silicon edge coupler devoid of a cantilever structure, leveraging a 130 nm CMOS process. By incorporating a silicon oxide cladding with a refractive index 0.007 greater than that of the buried oxide, we successfully mitigate silicon leakage losses, particularly for the TM mode. Furthermore, we introduce a novel taper shape design methodology rooted in mode analysis. Within this designed taper shape, the effective refractive index or area of the supported mode experiences an equal rate of change as the taper width increases. Thanks to these innovative designs, our simulations reveal a minimum loss of 0.82/1.68 dB and a loss range of 0.69/0.38 dB for TE/TM modes in the O band when interfacing with standard SMF. Most notably, our edge coupler, featuring the designed taper shape, demonstrates an average coupling loss improvement of 1.23/0.44 dB for TE/TM modes compared to the parabolic counterpart. This work introduces a novel taper shape design approach for compact and low-loss edge couplers, offering a practical solution for achieving low-loss SMF-chip coupling within the O band.

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Section: Design Of the Claddingmentioning

confidence: 95%

CMOS-compatible low-loss three-etching silicon O-band edge coupler with elaborate cladding and taper shape designs

Wang,

Zhang,

Wang

et al. 2023

Optoelectronic Devices and Integration XII

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show abstract

“…This substrate replacement can avoid silicon leakage and improve the mechanical strength of this structure. The LRIM can be magnesium fluoride (MgF 2 ) or silicon oxide with a certain porosity by controlling the deposition conditions such as temperature, variety, ratio, and flow rate of the gas mixture [ 15 , 16 , 17 ]. In addition, the LRIM could be replaced by other supporting materials such as metals or distributed bragg reflectors, as what has been conducted in the design of grating couplers [ 18 , 19 , 20 , 21 ].…”

Section: Structures and Methodsmentioning

confidence: 99%

CMOS-Compatible Ultralow-Loss Three-Step Silicon Edge Coupler with Substrate Substitution in the Whole Communication Band

Wang

Zhang

et al. 2022

Micromachines

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Edge coupler is a key component of silicon-based optoelectronic chips, which dramatically reduces the coupling loss between fibers and transmission waveguides. Here, we propose an ultralow-loss three-step silicon edge coupler based on a 130 nm CMOS process. By replacing the silicon substrate with a material with a lower refractive index than silicon oxide, the silicon leakage loss and polarization-dependent loss can be significantly improved. This structure avoids the existence of a cantilever, which enhances the mechanical strength of the edge coupler. Coupling with standard single-mode fiber, the simulation results demonstrate that the TE/TM mode has an ultralow loss of 0.63/1.08 dB at 1310 nm and 0.57/1.34 dB at 1550 nm, and the 0.5 dB bandwidth covering the entire communication band is about 400 nm. In the entire communication band, the polarization-dependent loss is less than 0.8 dB. Furthermore, we propose a taper shape design method based on mode analysis, which can be adapted for any taper to improve its compactness. Compared with the parabolic shape, the coupling loss of the edge coupler with a length of 460 μm for the TE mode is improved by 0.3 dB on average, this edge coupler provides a feasible solution for fiber-to-chip coupling and is perfectly suitable for wavelength division multiplexing applications in optical communications.

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“…Many studies have been conducted on using ICP-CVD for the deposition of SiO 2 films [8]. The influence of the process parameters on the stress, refractive index, and density of thin films is still a hot topic of research [9,10]. Many studies have focused on the effect of process parameters on electrical properties, such as capacitance-voltage (C-V) characteristics [11], breakdown electric field [12], and leakage currents [13].…”

Section: Introductionmentioning

confidence: 99%

Low-Temperature Deposition of High-Quality SiO2 Films with a Sloped Sidewall Profile for Vertical Step Coverage

Liang

Zhong

et al. 2022

Coatings

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SiO2 is one of the most widely used dielectric materials in optical and electronic devices. The Josephson voltage standard (JVS) chip fabrication process has rigorous requirements for the deposition temperature and step-coverage profiles of the SiO2 insulation layer. In this study, we deposited high-quality SiO2 insulation films at 60 °C using inductively coupled plasma-chemical vapor deposition (ICP-CVD) to fulfill these requirements and fabricate JVS chips simultaneously. SiO2 films have a high density, low compressive stress, and a sloped sidewall profile over the vertical junction steps. The sidewall profiles over the vertical junction steps can be adjusted by changing the radio frequency (RF) power, ICP power, and chamber pressure. The effects of sputtering etch and sloped step coverage were enhanced when the RF power was increased. The anisotropy ratio of the deposition rate between the sidewall and the bottom of the film was lower, and the sloped step coverage effect was enhanced when the ICP power was increased, or the deposition pressure was decreased. The effects of the RF power on the stress, density, roughness, and breakdown voltage of the SiO2 films were also investigated. Despite increased compressive stress with increasing RF power, the film stress was still low and within acceptable limits in the device. The films deposited under optimized conditions exhibited improved densities in the Fourier transform infrared spectra, buffered oxide etch rate, and breakdown voltage measurements compared with the films deposited without RF power. The roughness of the film also decreased. The step-coverage profile of the insulation layer prepared under optimized conditions was enhanced in the junction and bottom electrode regions; additionally, the performance of the device was optimized. This study holds immense significance for increasing the number of junctions in future devices.

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Stress and Refractive Index Control of SiO2 Thin Films for Suspended Waveguides

Cited by 7 publications

References 29 publications

CMOS-compatible low-loss three-etching silicon O-band edge coupler with elaborate cladding and taper shape designs

CMOS-compatible low-loss three-etching silicon O-band edge coupler with elaborate cladding and taper shape designs

CMOS-Compatible Ultralow-Loss Three-Step Silicon Edge Coupler with Substrate Substitution in the Whole Communication Band

Low-Temperature Deposition of High-Quality SiO2 Films with a Sloped Sidewall Profile for Vertical Step Coverage

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