Stress distribution under electroless nickel bumps extracted using arrays of 7

Design and use of an array-based test structure to characterize mechanical stress effects caused by WLCSP solder bumps

“…To compensate for wafer-to-wafer and dieto-die differences, parameter differences across each array are normalized using the median of a subset of 60 DUTs that are located as far away as possible from the bumps, while not being located at the edges of the array. In terms of array coordinates this encompasses DUTs (33,3) to (38, 7) and ( Figure 7. Example of (relative) conductance variability in a 2100-DUT-array for P-active resistors.…”

“…Such sensor rosettes occupy significant area and hence result in relatively large sampling distances and limited sensor array sizes. Similar limitations hamper other, CMOS multiplexer based, test chips as for instance reported in [5][6][7][8][9]. The array-based test structure implementation chosen for the work described in this paper combines learnings from prior art array-style test chips, many of which were discussed before at ICMTS e.g.…”

Flexible silicon triaxial tactile imager with integrated 800µm-pitch sensor pixel structures on a diaphragm

“…Recently, technology of multi-axis and high density CMOS strain sensors has been reported [3,4]. In our group, uniaxial tactile imagers with high spatial resolution and multifunctional detection abilities has been developed [5] based on CMOS/MEMS technology.…”