“…Recently, the long-term stability issue of SiC devices has received much attention after it was discovered that stacking fault ͑SF͒ formation 2 during room-temperature electrical stressing of 4H-and 6H-SiC pn diode structures [3][4][5] or during high-temperature processing of 4H-SiC materials with heavily n-type epilayers 6 or substrates 7,8 caused significant changes to optical and electrical behavior. It was found that basal plane SFs in 4H-SiC host resulted in planar ''cubic inclusions,'' i.e., thin ͑Ͻ1.5 nm͒ sheets with cubic 3C local stacking embedded in the 4H-SiC host ͑in the electrically stressed diodes, all the inclusions observed by TEM were found to be of the ''single-SF'' type 5,9 while those observed in the high-temperatureprocessed material were all ''double-SF'' inclusions 6,8,10 ͒. It was proposed that these cubic inclusions should behave as unique ''structure-only'' electron quantum wells ͑QWs͒, 2,11-13 which are delimited only by a change in local stacking.…”