STT-MRAM-Based Reliable Weak PUF

Hu, Yupeng; Wu, Linjun; Chen, Zhuojun; Huang, Yun; Xu, Xiaolin; Li, Keqin; Zhang, Jiliang

doi:10.1109/tc.2021.3095657

Cited by 12 publications

(3 citation statements)

References 32 publications

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“…Thus, it is crucial to determine an appropriate rate value and identify the type of ECC suitable for PUF. Notably, the reconfigurable STT-MRAM weak PUF studied by Zhang Jiliang et al in 2022 exhibits a BER of less than or equal to 2.13% within the temperature range of -20 °C to 90 °C [2]. Similarly, the maximum BER of the reconfigurable SOT-MRAM PUF studied by Wang Zhaohao et al has been reduced to 0.14% and 0.12% under the conditions of 100 °C and 0.9 V [31].…”

Section: A Features Of Eccs For Pufmentioning

confidence: 97%

A Highly Reliable Reconfigurable SRAM PUF Based on Error Correction Codes and Capacitor Preselection

Yuyuan,

Xueqiang

2024

Preprint

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In recent years, researchers have extensively utilized the inherent variations occurring during the manufacturing process of integrated circuits to create physical unclonable functions (PUFs) as hardware security primitives. However, traditional static entropy sources employed in PUF applications exhibit certain drawbacks, including limited availability of challengeresponse pairs (CRPs) and inadequate randomness. Additionally, the reliability of PUFs is compromised due to the impact of temperature and voltage fluctuations as well as aging effects. To address these issues, this article presents a novel architecture for PUFs based on Static Random Access Memory (SRAM) along with a more suitable error-correcting code (ECC). Our approach enhances the reliability of SRAM-based PUFs both internally, through capacitor preselection, and externally, by employing ECC. The coding and decoding process of the ECC is elaborated in detail. Furthermore, we analyze the relevant parameters of the ECC and demonstrate that the combination of these techniques results in a final bit error rate (BER <0.1%). Through calculations, we validate that our reconfigurable SRAM PUF can yield a larger number of CRPs. Experimental results conducted on Xilinx Artix 7 demonstrate that the ECC we employ achieves an ideal BER for PUFs, while simultaneously reducing hardware overhead by 80%.

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Section: A Features Of Eccs For Pufmentioning

confidence: 97%

A Highly Reliable Reconfigurable SRAM PUF Based on Error Correction Codes and Capacitor Preselection

Yuyuan,

Xueqiang

2024

Preprint

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“…The researchers simulated this PUF design and presented an inter-distance of 0.501, an entropy calculation of 0.985, and a BER of 6.6 × 10 −6 . STT MRAM PUF research has been further explored in subsequent studies, such as [17,31,32].…”

Section: Mram Pufsmentioning

confidence: 99%

“…In [32], the authors put forth an STT MRAM PUF concept that involves comparing the resistances of multiple MTJ cells by passing a current through them. Through simulations, this proposal achieved a BER of 1.56% and a uniqueness metric of 50.0428%.…”

Section: Mram Pufsmentioning

confidence: 99%

MRAM Devices to Design Ternary Addressable Physically Unclonable Functions

2023

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We introduce a novel approach to constructing ternary addressable physically unclonable functions (TAPUFs) using magnetoresistive random-access memory (MRAM) devices. TAPUFs use three states (1, 0, and X) to track unstable cells. The proposed TAPUF leverages the resistance properties of MRAM cells to produce unique digital fingerprints that can be effectively utilized in cryptographic protocols. We exploit the cell-to-cell variations in resistance values to generate reliable cryptographic keys and true random numbers, which can add protection against certain attacks. To evaluate the performance of the TAPUF, various tests were conducted, including assessments of inter-cell to intra-cell variation, inter-distance, bit error rate (BER), and temperature variation. These experiments were conducted using a low-power client device to replicate practical scenarios. The obtained results demonstrate that the proposed TAPUF exhibits exceptional scalability, energy efficiency, and reliability.

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