Study of Metal–Dielectric Interface for Improving Electrical Properties and Reliability of DRAM Capacitor

Abstract

The interface between a dielectric thin film and a metal electrode is studied to improve reliability as well as electrical properties of the metal–insulator–metal (MIM) capacitor in dynamic random‐access memory (DRAM) devices. The interfacial layers between a dielectric thin film and a metal electrode play important functional roles such as increasing the electrical barrier or preventing oxygen defects in high‐k dielectrics. By introducing an electrical barrier layer or a sacrificial layer at the metal–dielectric interface for engineering the electronic band, lattice, or dipole, various effects could be confirmed such as the conduction band offset (CBO), bandgap or mismatch modulation for controlling the dielectric loss depending on the AC frequency or leakage current of MIM capacitors. Upon the insertion of Al2O3 as an electrical barrier layer, CBO increased because of the band engineering. Further, upon the insertion of TiO2 as a sacrificial layer at the interface, CBO increased because of the dipole formation at the interface, attributed to the difference in electronegativity. Thus, a robust MIM capacitor for DRAM that maintains a low leakage current and has improved reliability which is realized using the proper combination of interfacial layers.

Enhancing chemisorption efficiency and thin-film characteristics via a discrete feeding method in high-k dielectric atomic layer deposition for preventing interfacial layer formation

“…Simultaneously, TiN may be oxidized to form TiON, which is one of the suggested mechanisms for the formation of the interfacial layer. 4,18,19 In the Ti 2p spectra, the 2p 3/2 peak was deconvoluted into peaks at the binding energy of 454.6 and 458.4 eV corresponding to Ti-N and Ti-O-N bonding, respectively. 18 Due to air exposure, the TiN substrate has an oxidized surface of TiON, inevitably.…”

“…The reliability of a DRAM capacitor is also deteriorated by its interfacial characteristics. [4][5][6][7] Eventually, interfacial characteristics degrade the electrical properties of an entire MIM capacitor.…”

Suppressing Interfacial Layer Formation in ZrO2-Based Capacitors with TiN Electrodes via a MgO Thin-Film Oxygen Diffusion Barrier

“…This TiO x N y interfacial layer is formed through oxygen diffusion toward TiN BE via O 3 , which has a strong oxidation potential, during the ALD of ZrO 2 . − It is also formed by the reaction between the exposed TiN electrode surface and O 3 during the initial nucleation step of the ALD of ZrO 2 performed on the TiN electrode . The high defect density of the TiO x N y interfacial layer creates charge traps and degrades the performance and reliability of metal–insulator–metal (MIM) capacitors. − Moreover, as the thickness of the dielectric film is decreased through device downscaling, the proportion of the interfacial layer in the MIM capacitors increases. Thus, suppressing the interfacial layer formation is an important challenge.…”

Dielectric Constant Enhancement and Leakage Current Suppression of Metal–Insulator–Metal Capacitors by Atomic Layer Annealing and the Capping Layer Effect Prepared with a Low Thermal Budget

“…In recent decades, high- K dielectrics have been intensively studied to meet the specification of high-performance MIM capacitors. − Among the high- K dielectrics, ZrO 2 is attractive because of its high dielectric constant, large energy bandgap, and excellent compatibility with semiconductor fabrication processes. − However, it is difficult for a single ZrO 2 layer to achieve a low leakage current density due to the presence of vacancy-type defects (such as oxygen vacancies) while keeping a low EOT . Hence various oxide stack structures, such as ZrO 2 /Al 2 O 3 /ZrO 2 (ZAZ), , ZrO 2 /SiO 2 /ZrO 2 (ZSZ), , ZrO 2 /Y 2 O 3 /ZrO 2 (ZYZ), and ZrO 2 /La 2 O 3 /ZrO 2 (ZLZ), have been proposed and investigated, in which the ZAZ structure is the most widely used oxide stack in MIM capacitors in recent years. , The introduction of an Al 2 O 3 interlayer into the oxide stack can suppress the leakage current. , However, it results in a decrease in the capacitance . The crystallinity of ZrO 2 on the upper layer of Al 2 O 3 is deteriorated by the Al 2 O 3 interlayer, resulting in a decrease in the dielectric constant. , In order to get a good crystallinity of ZrO 2 overlying the Al 2 O 3 interlayer, the postannealing treatment at a temperature of ∼600 °C is usually needed. ,− Nevertheless, the high-temperature annealing leads to an increase in leakage current as a result of the generation of grain boundaries, which hinders the reduction of the oxide thickness in the MIM structure for further EOT scaling .…”

“…17,18 The introduction of an Al 2 O 3 interlayer into the oxide stack can suppress the leakage current. 23,24 However, it results in a decrease in the capacitance. 25 The crystallinity of ZrO 2 on the upper layer of Al 2 O 3 is deteriorated by the Al 2 O 3 interlayer, resulting in a decrease in the dielectric constant.…”