Study of ultra-low specific on-resistance and high breakdown voltage SOI LDMOS based on electron accumulation effect

Abstract

A novel stepped L-shaped trench gate silicon-on-insulator (SOI) lateral double-diffused metal oxide semiconductor field-effect transistor (LDMOS) with N-pillar (SLTGN-LDMOS) is proposed. SLTGN-LDMOS contains a highly doped N-pillar, assisting in reducing the specific on-resistance (Ron,sp). The stepped L-shaped trench gate (SLTG) attracts electrons to attach to the edge of the trench, thus directing more current to flow along the edge, which decreases Ron,sp effectively. Furthermore, new electric field peaks are generated on the surface of the drift region, thus increasing the breakdown voltage (BV). As a result, compared with the conventional structure (C-LDMOS), the BV of SLTGN-LDMOS increases from 63 V to 162.7 V, and the Ron,sp decreases from 1.85 mΩ·cm2 to 1.46 mΩ·cm2. Then, the figure of merit (FOM1, BV2 / Ron.sp) increases remarkably from 2.15 MW/cm2 to 18.13 MW/cm2. In addition, the maximum surface temperature of SLTGN-LDMOS is 395.3 K, slightly lower than the 398.7 K of C-LDMOS.