Study of uniformly doped nano scale single-walled CNTFET under dark and illuminated conditions

2021

JECNAM

A flip-flop is a basic storage element used to store information. It is used to build RAM, latches, shift registers, counters, and other digital circuits. This paper proposes a new innovative design for D flip-flops. This design consumes much less power than previous flip-flop designs. The first proposed design introduces two gate-leakage transistors at the output gate using the GALEOR method. The second proposed design uses ONOFIC technology. Therefore, compared to the previous design, the power consumption of Design-I and Design-II is reduced by 35.61% and 34.36%, respectively. The proposed design is simulated using a Cadence tool using 90nm CMOS technology operating at 500MHz.

Section: Literature Reviewmentioning

confidence: 99%

Low Power D Flip Flop Design for VLSI Applications

2021

JECNAM

“…Here, reading and writing are done through a single bit line [13][14][15]. The logic is stable after writing, but reading requires additional circuitry such as sense amplifiers [16][17][18][19][20]. The conventional 8T circuit proposed in [21][22][23][24] is also simulated with conventional 6T batteries, and the transient analysis of the circuit is carried out, and the power consumption is calculated.…”

Section: Introductionmentioning

confidence: 99%

6T and 8T SRAM Cell Simulation with Power Loss Analysis

2022

JECNAM

Reducing the power consumption in a VLSI circuits is a prime concern now a days. Memory circuits play an important role in the design of electronic small power devices. Almost every digital systems is having memory as an important part in their design. The high speed circuits dissipate a considerable amount of power in a short time. In this paper conventional SRAM cell is modified little bit to reduce the dynamic power dissipation. The overall capacitance reduced by adding few extra transistors. Because of the fact that charging and the discharging of the bit lines consumes the most power , so 6T cell and 8T cell can be used to reduce the power by adding an extra number of transistors to the pull down path. In this paper 6T SRAM cell as well as 8T SRAM cell simulated and their performance compared in terms of power dissipation.

“…Of the three, memory-based implementations are gaining popularity due to the significant growth of VLSI memory technology.Semiconductor memory is becoming cheaper, faster and consumes less power due to continuous improvements in silicon scaling technology. Advances in memory technology [14][15][16][17][18] have enabled better memory design based on application requirements today, and efficient memory-based multipliers are also possible.In the past, memory was a separate part of the processor unit, but now memory is part of the processor [19][20][21][22]. Since OMS-based multipliers already exist, I wanted to try an efficient OMS-based multiplier design that I hadn't explored and dealt with before.…”

Section: Introductionmentioning

confidence: 99%

Modified Efficient OMS LUT Design for Memory-Based Multiplication

2022

JAIMLNN

This paper proposes an efficient LUT (Look-Up-Table) design called Efficient EOMS (Efficient-OMS Design) for memory-based operations. This proposed design can be used for FPGA implementation as well as ASIC. The proposed design is a better choice than ordinary OMS (Odd Multiplier Store) and is preferred in many DSP calculations where one of the inputs to the filter coefficients is fixed. In this design (N+1), the possible product terms of the input multiplicands with fixed coefficients are stored directly in memory. Doing so allows for a simpler and faster design, unlike the previous proposal OMS (Odd Multiple Storage).Designs that extract odd multiples of the product term can significantly reduce path delay and area complexity with very simple control circuitry. Using (N+1) technology can significantly reduce the area compared to ordinary OMS technology. Additionally, the EOMS technical design is coded in Verilog and simulated and synthesized using Xilinx tools.