Study on the layering phenomenon of SiC porous layer fabricated by constant current electrochemical etching

Abstract

Electrochemical etching of silicon carbide (SiC) material has received increasing attention in recent years, due to its simple procedure, low cost and significance in the exploration of novel optoelectronic devices. In this paper, 4H-SiC substrates were electrochemically etched at a constant current density of 392.98 mA cm−2 in an electrolyte made up of hydrofluoric acid and deionized water. The layering of a SiC porous layer and periodic fluctuation of the voltage were witnessed for the first time, with the layering phenomenon corresponding well to the voltage period. However, no such phenomenon was observed when the SiC substrates were anodic etched under the same conditions with magnet stirring. As a result, the periodic variation of voltage was hypothesized to be the cause of regular layering during constant current electrochemical etching. Electrochemical etching in potentiostatic mode was thus performed at different voltages. We found that the diameter of the SiC nanopores increased while the thickness of the sidewall decreased with the increasing voltage. Based on the experimental findings, a model of mass transport was proposed. The mass transport process leads to periodic changes in resistance, hence the periodic change in voltage. This successfully explained the reason for the layering. Furthermore, SiC substrates were also electrochemically etched at high and low current densities, finding the existence of a threshold current density for the occurrence of the layering. Energy dispersive x-ray spectroscopy analysis showed that the composition of the SiC porous layer remained unchanged compared to the pure SiC wafer, implying that the peeling-off of the SiC porous layer obtained by electrochemical etching can be directly adopted for use on devices requiring a SiC porous structure.

Electrochemical etching modes of 4H-SiC in KOH solutions

“…Several studies have applied electrochemical methods in electrochemical mechanical polishing [17][18][19][20], nanoporous SiC preparation [21][22][23][24][25][26][27][28], defect characterization [29], and micromachining of microelectronics [30,31]. However, these investigations on concentrated micromachining suffer from issues of low etching rates and poor surface morphology.…”

Review—Progress in Electrochemical Etching of Third-Generation Semiconductors

“…The mass change led to the periodic change of the voltage which directly resulted in the formation of hierarchical porous structure layers. 26 The morphology of the porous SiC layer was closely related to the current density. 27 At low current density, the pore density of the porous layer was low and small pores with branches downwards were formed; at medium current density, the pore size and depth increased, and the pores grew perpendicular to the surface, forming a columnar pore structure; at high current density, the pore structure remained vertical, but the pore size increased while the pore depth decreased.…”

Selective removal of 4H-SiC porous structures caused by photoelectric chemical etching via post oxidation annealing

“…When the bubble volume exceeds the critical value, the bubble desorption occurs, and KOH solution floods in to dissolve the oxide layer. The process is repeated over and over to produce porous SiC structures [23]. This etching mode is more akin to anisotropic etching, wherein continuous etching in regions with higher conductivity is favored.…”