Sub 10-nm contact holes with aspect ratio over sixty formed by e-beam resist shrinkage techniques

Abstract

E-beam chain scission resist ZEP520A with 400 nm thickness was studied for sub-10 nm contact holes with high aspect ratio formed by CD shrinkage techniques of thermal reflow and SAFIER. CD shrinkage temperatures and repeating times were process parameters to be studied. Design parameters of initial CD of 40-100 nm and line/space ratio of contact hole with 1/3 and >1/20 before shrinkage were also studied. Process window of thermal reflow for the aforementioned initial CDs is 155-165 o C while that of SAFIER is 150-165 o C. There is no shrinkage for both methods for temperatures below 140 o C. CD shrinkage rates of both methods decrease for more than one time of heating. Thermal reflow has a larger CD shrinkage rate than SAFIER. The dependence of shrinkage rate on initial CD size and spatial frequency is not apparent. CD nearly ceases shrinking for further heatings as the CD reaches an ultimate CD size. The ultimate CD for a larger initial CD is also larger. The smallest shrunk CD is found to be 5.8 nm with aspect ratio over sixty for 50 nm initial designed CD. CD uniformity also studied for both processes with 3-sigma smaller than +/-10%. The contact holes shrunk by thermal reflow process generally show funnel-shape profiles while those shrunk by SAFIER process show similar profiles with wider undercut. In summary, the thermal reflow process results in better profile while the SAFIER with slower CD shrinkage rate has a better control on CD and uniformity.

Gap-fill type HSQ/ZEP520A bilayer resist process-(I): HSQ-coated ZEP520A CD shrinkage for 32-nm trench patterns

“…7. Profile for W/L of 1/2 is similar to that shown in [1] with sub-10 nm shrunk CD while that for W/L of 1/10 and 1/50 are tapered and non-symmetric on the edges of trench. Fig.…”

“…Thermal reflow CD shrinkage technique was commonly applied to the formation of contact hole (C/H) with feature size smaller than the designed value for advanced patterning [1]. There are limited numbers of articles studying the CD shrinkage techniques of trench / space type patterns for CD smaller than the resolution limit of lithography [2].…”

Sub-30nm TiN/Ti/HfOx pillar formed by tone reverse processes for RRAM applications

“…All the resolved CDs of C/H on ZEP520A with DCD of 40-100 nm are larger than 100 nm without proximity effect correction (PEC) on blank RRAM film stacking substrate. Substrates used in this paper have thicker and more complicated film stacking than that used previously [2] which contribute to more serious proximity effect and therefore resulting in abnormal ADI_CDs on ZEP520A. Process condition 2 is the dose split used previously [2] which is apparently not enough to resolve patterns.…”

“…Substrates used in this paper have thicker and more complicated film stacking than that used previously [2] which contribute to more serious proximity effect and therefore resulting in abnormal ADI_CDs on ZEP520A. Process condition 2 is the dose split used previously [2] which is apparently not enough to resolve patterns. Two groups of process conditions in Table II and Fig.…”

“…C/H CD size after multiple reflow processes must consider the contribution of these four factors. The aforementioned activation energy barrier of reflow time threshold may be related to overcoming resist surface energy to form tapered sidewall profiles of C/H [2]. Table II as shown in Fig.5 after various steps of thermal reflow and etching for C/H Table II.…”