Sub-10-nm structures written in ultra-thin HSQ resist layers using electron-beam lithography

Grigorescu, Anda E.; Krogt, Marco C. van der; Hagen, C. W.

doi:10.1117/12.725851

Cited by 15 publications

(6 citation statements)

References 13 publications

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“…Semiconductor processing allows for highly accurate registration of TMD QD patterns with respect to other features at the 10 nm length scale, while size control is obtained by etching conditions. Since direct exposure of monolayer MoS 2 to an electron beam degrades the materials optical quality and electrons with energy greater than 80 keV can break Mo-S bonds and introduce structural defects [24], patterning methods requiring high e-beam exposure doses typical in high resolution e-beam lithography [25] are not acceptable. We overcome this limitation by only exposing the surrounding area of each dot followed by a reactive ion etch to further reduce the monolayer size to the desired lateral scale (for more information, see Supplementary Information).…”

Section: Size-dependent Quantum Confinement In 2d Monolayer Semicondu...mentioning

confidence: 99%

Valley Polarization in Size-Tunable Monolayer Semiconductor Quantum Dots

Wei,

Czaplewski,

Lenferink

et al. 2015

Preprint

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Three-dimensional confinement allows semiconductor quantum dots (QDs) to exhibit sizetunable electronic and optical properties that enable a wide range of opto-electronic applications from displays, solar cells and bio-medical imaging to single-electron devices. Additional modalities such as spin and valley properties can provide further degrees of freedom requisite for quantum information and spintronics. When seeking to combine these material features into QD structures, however, confinement can cause hybridization that inhibits the robustness of these emergent properties for insertion into quantum devices. Here, we show that a new class of laterally-confined materials, monolayer MoS 2 QDs, can be created through top-down nanopatterning of an atomically-thin two-dimensional semiconductor so that they exhibit the same valley polarization as in a continuous monolayer sheet. Semiconductor-compatible nanofabrication process allows for these lowdimensional materials to be integrated into complex systems, an important feature for advancing quantum information applications. The inherited bulk spin and valley properties, the size dependence of excitonic energies, and the ability to fabricate MoS 2 QDs using semiconductor-compatible processing suggest that monolayer semiconductor QDs have the potential to be multimodal building blocks of integrated quantum information and spintronics systems.

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Section: Size-dependent Quantum Confinement In 2d Monolayer Semicondu...mentioning

confidence: 99%

Valley Polarization in Size-Tunable Monolayer Semiconductor Quantum Dots

Wei,

Czaplewski,

Lenferink

et al. 2015

Preprint

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“…It offers high resolution in defining dots and lines of sub-10 nm dimensions [2,3]. Nanoscale patterns defined in HSQ also display minimum linewidth fluctuations [1,4] and show sufficient etching durability [1].…”

Section: Introductionmentioning

confidence: 98%

Aged hydrogen silsesquioxane for sub-10nm line patterns

Chen

Zhang²,

Constantoudis³

et al. 2016

Microelectronic Engineering

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“…The technology, in principle, scales to resolutions below 10 nm, as shown by extreme ultraviolet interference lithography . Also several mask-less techniques such as electron beam lithography (EBL) in ultrathin resist layers, , electron beam induced deposition (EBID), and helium ion beam lithography (HIBL) have demonstrated sub-10 nm resolution capabilities in patterning dense lines with tight pitch. Using EBL, the transfer of sub-15 nm half-pitch patterns into silicon was demonstrated and used for subsequent nanoimprint and metal lift-off …”

mentioning

confidence: 99%

Sub-10 Nanometer Feature Size in Silicon Using Thermal Scanning Probe Lithography

et al. 2017

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High-resolution lithography often involves thin resist layers which pose a challenge for pattern characterization. Direct evidence that the pattern was well-defined and can be used for device fabrication is provided if a successful pattern transfer is demonstrated. In the case of thermal scanning probe lithography (t-SPL), highest resolutions are achieved for shallow patterns. In this work, we study the transfer reliability and the achievable resolution as a function of applied temperature and force. Pattern transfer was reliable if a pattern depth of more than 3 nm was reached and the walls between the patterned lines were slightly elevated. Using this geometry as a benchmark, we studied the formation of 10–20 nm half-pitch dense lines as a function of the applied force and temperature. We found that the best pattern geometry is obtained at a heater temperature of ∼600 °C, which is below or close to the transition from mechanical indentation to thermal evaporation. At this temperature, there still is considerable plastic deformation of the resist, which leads to a reduction of the pattern depth at tight pitch and therefore limits the achievable resolution. By optimizing patterning conditions, we achieved 11 nm half-pitch dense lines in the HM8006 transfer layer and 14 nm half-pitch dense lines and L-lines in silicon. For the 14 nm half-pitch lines in silicon, we measured a line edge roughness of 2.6 nm (3σ) and a feature size of the patterned walls of 7 nm.

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Sub-10-nm structures written in ultra-thin HSQ resist layers using electron-beam lithography

Cited by 15 publications

References 13 publications

Valley Polarization in Size-Tunable Monolayer Semiconductor Quantum Dots

Valley Polarization in Size-Tunable Monolayer Semiconductor Quantum Dots

Aged hydrogen silsesquioxane for sub-10nm line patterns

Sub-10 Nanometer Feature Size in Silicon Using Thermal Scanning Probe Lithography

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