Subway Train Braking System: A Fuzzy Based Hardware Approach

Abstract

Problem statement: Automated subway train-braking system require perfection, efficiency and fast response. In order to cope with this concerns, an appropriate algorithm need to be developed which need to be implemented in hardware for faster response. Approach: In this research, the FPGA realization of fuzzy based subway train braking system has been presented on an Alter FLEX10K device to provide an accurate and increased speed of convergence of the network. The fuzzy based subway train braking system is comprised of fusilier, inference, rule selector and defuzzifier modules. Sixteen rules are identified for the rule selector module. After determining the membership functions and its fuzzy variables, the Max-Min Composition method and Madman-Min implication operator are used for the inference module and the Centre of Gravity method is used for the defuzzification module. Each module is modeled individually using behavioral VHDL. The layers are then connected using structural VHDL. Two 8-bit and one 8-bit unsigned digital signals are used for input and output respectively. Six ROMs are defined in order to decrease the chances of processing and increasing the throughput of the system. Results: Functional simulations were commenced to verify the functionality of the individual modules and the system as well. We have validated the hardware implementation of the proposed approach through comparison, verification and analysis. The design has utilized 2372 units of LC with a system frequency of 139.8MHz. Conclusion: In this research, the FPGA realization of fuzzy brake system of subway train has been successfully implemented with minimum usage of logic cells. The validation study with C model shows that the hardware model is appropriate and the hardware approach shows faster and accurate response with full automatic control.

Single Core Hardware Module to Implement Boolean Function Classification Techniques

“…From the perspective of computer-aided design, FPGA comes with the merits of lower cost, higher density and shorter design cycle (Choong et al, 2005;Akter et al, 2008;Reaz et al, 2011b). It comprises a wide variety of building blocks.…”