Superconducting in-memory computing architecture coupling with memristor synapses for binarized neural networks

Abstract

In-memory computing electronic components offer a promising non-von Neumann strategy to develop energy-efficient and high-speed hardware systems for artificial intelligence (AI). However, the implementation of conventional electronic hardware demands a huge computational and power budget, thereby limiting their wider application. In this work, we propose a novel superconducting in-memory computing architecture by coupling the memristor device. Leveraging the phase transition of the superconductor induced by external applied Joule power, we can modulate the state of the bottom superconductor based on memristor resistive states and applied voltages, enabling the execution of in-memory computing operations. We then successfully implement vector-matrix multiplication of input and output signals within the designed array, facilitating its integration into AI systems. Constructing a binarized neural network with superconductor-memristor arrays achieves a high level of accuracy, approximately 97%, in handwritten number classification. Through an evaluation of power consumption in our proposed architecture, we find a remarkable ~48400× advantage in power efficiency compared to typical memristor systems. This marks the inaugural demonstration of a superconducting in-memory computing architecture through memristor coupling, offering a promising hardware platform for various AI systems with superior energy efficiency and computing capacity.