Superconformal Electrodeposition of Silver from a KAg(CN)[sub 2]-KCN-KSeCN Electrolyte

Israel Journal of Chemistry

2010

Electrodeposition is a key fabrication process used in the state‐of‐the‐art multilevel Cu metallization of microelectronic interconnects, from transistor to circuit board length scale. Recent electrochemical surface science and feature filling studies have provided mechanistic insight into the role of additives in superconformal film growth responsible for void‐free filling of recessed surface features. These studies have shown that a physical model based on mass conservation of accelerating surfactant species during area change very effectively describes feature filling of Cu, Ag, and Au from different electrolytes. This paper presents a selective and cursory review of some relevant developments underway in our laboratory.

Section: Superconformal Cu Electrodepositionmentioning

confidence: 99%

Superconformal Electrodeposition for 3‐Dimensional Interconnects

Israel Journal of Chemistry

2010

“…2-9 CEAC-based copper processes continue to enable rapid, defect-free filling of ever-smaller Damascene interconnects, and processes based on the CEAC mechanism have been demonstrated and quantified for Damascene superfilling with gold, 10,11 silver [12][13][14] and copper-silver alloys. 15,16 The additive combinations of accelerator and suppressor associated with Damascene copper superfilling of submicrometer features have also been applied to much larger, lower aspect ratio microvias and more recently higher aspect ratio Through Silicon Vias (TSVs).…”

mentioning

confidence: 99%

Bottom-Up Electrodeposition of Zinc in Through Silicon Vias

2015

J. Electrochem. Soc.

Self Cite

This paper describes superconformal feature filling during zinc electrodeposition in a sulfate electrolyte. Localized bottom-up filling of Through Silicon Vias (TSVs) with no deposition on the sidewalls or the field around them is demonstrated in electrolytes containing a deposition rate suppressing additive. This behavior is seen when feature filling proceeds at potentials in proximity to where suppression breakdown and localized zinc deposition are noted in electroanalytical measurements with planar rotating disk electrodes. The favorable comparison with previous results for bottom-up feature filling of Cu, Au and Ni further demonstrates the central role of additive-derived negative differential resistance (NDR) in extreme bottom-up feature filling. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution Non-Commercial No Derivatives 4.0 License (CC BY-NC-ND, http://creativecommons.org/licenses/by-nc-nd/4.0/), which permits non-commercial reuse, distribution, and reproduction in any medium, provided the original work is not changed in any way and is properly cited. For permission for commercial reuse, please email: oa@electrochem.org. [DOI: 10.1149/2.0031504jes] All rights reserved. Superconformal electrodeposition that preferentially deposits material within patterned features has been demonstrated by a number of different mechanisms. In particular, superconformal copper deposition known as "superfilling" that enabled electrodeposited copper interconnects to displace aluminum interconnects in modern microelectronics 1 relies on the Curvature Enhanced Accelerator Coverage (CEAC) mechanism 2-6 whose operational dynamic range is determined by the immersion conditions, additive adsorption kinetics and mass transport considerations.2-9 CEAC-based copper processes continue to enable rapid, defect-free filling of ever-smaller Damascene interconnects, and processes based on the CEAC mechanism have been demonstrated and quantified for Damascene superfilling with gold, 10,11 silver [12][13][14] and copper-silver alloys. 15,16 The additive combinations of accelerator and suppressor associated with Damascene copper superfilling of submicrometer features have also been applied to much larger, lower aspect ratio microvias and more recently higher aspect ratio Through Silicon Vias (TSVs). [17][18][19][20][21][22][23][24][25] However, at these larger length scales electrical and compositional gradients begin to exert a much more important role on feature filling behavior. Under certain conditions, positive feedback associated with suppressor breakdown stimulated by local deposition coupled with highly non-linear metal deposition kinetics yields what has been termed "extreme bottom-up filling" of TSVs 19,26-29 as well as "butterfly filling" of printed circuit board through-holes. [30][31][32] More specifically, the feature filling derives from the additive-derived negative differential resistance mechanism (NDR) [33][34][35] that captures instabili...

“…[4][5][6][7] Of particular interest is the substantial literature on solution or vapor processing to yield a wide variety of nanostructures including high aspect ratio nanowires. 4,8,9 Solution-based, chemical reduction processes are attractive because they are inexpensive and scalable.9-18 Subsequent processing involving particle packing and/or substrate interactions can lead to higher order organization and colloidal crystals.19 Alternatively, nanostructures can be grown on or in surfaces that have been shaped by lithography or other means to obtain control of orientation and/or placement.8 Electrochemical processing may involve throughmask plating in patterned templates 20,21 or superconformal electrodeposition of metals and alloys [22][23][24][25][26][27][28][29][30][31] including gold 32-34 in high aspect ratio features. However, these processes require nanoscale patterned topography to create such structures and the associated patterning often comes with increased processing complexity.…”

mentioning

confidence: 99%

Morphological Transitions during Au Electrodeposition: From Porous Films to Compact Films and Nanowires

Levin

2015

J. Electrochem. Soc.

Self Cite

Gold electrodeposition was studied in a sulfite electrolyte to which micromolar concentrations of Tl 2 SO 4 were added. Hysteresis and a regime of negative differential resistance (NDR) evident in electroanalytical measurements are correlated with deposit morphology and interpreted through measurements of thallium underpotential deposition (upd). Deposit morphologies range from specular surfaces to highly faceted dendrite-like grains of moderate aspect ratio and, for potentials within the NDR region, sub-50 nm diameter, high aspect ratio 110 oriented single crystal nanowires. The nanowires exhibit an epitaxial relationship to the substrate that permits one step fabrication of surfaces densely covered with high aspect ratio nanowires having controlled orientations. The NDR and nanowires are a consequence of the non-monotonic relationship between Tl coverage and growth velocity; at low coverage Tl accelerates Au deposition while at higher coverage it inhibits deposition. Immiscibility of the Tl and Au supports on-going surface segregation during area expansion that accompanies nanowire growth leading to greater dilution of the additive coverage and more rapid growth at the nanowire tips, while the sidewalls remain passivated by a saturated Tl coverage. Interest in nanostructures is driven by the unique properties associated with high surface area to volume materials that express quantum or mesoscale phenomena of importance to diverse subjects ranging from biology and medicine 1-3 to optics and energy conversion. [4][5][6][7] Of particular interest is the substantial literature on solution or vapor processing to yield a wide variety of nanostructures including high aspect ratio nanowires. 4,8,9 Solution-based, chemical reduction processes are attractive because they are inexpensive and scalable.9-18 Subsequent processing involving particle packing and/or substrate interactions can lead to higher order organization and colloidal crystals.19 Alternatively, nanostructures can be grown on or in surfaces that have been shaped by lithography or other means to obtain control of orientation and/or placement.8 Electrochemical processing may involve throughmask plating in patterned templates 20,21 or superconformal electrodeposition of metals and alloys [22][23][24][25][26][27][28][29][30][31] including gold 32-34 in high aspect ratio features. However, these processes require nanoscale patterned topography to create such structures and the associated patterning often comes with increased processing complexity.Controlled anisotropic growth and orientation, if not position, is possible through vapor-liquid-solid (VLS) growth processes. Fabrication of semiconductor and oxide nanowires typically uses dewetting of a low melting point metal catalyst where the resulting clusters set the feature size while epitaxy to the underlying substrate can control the growth orientation. 5,[35][36][37] More recently, an electrochemical electrolyte-liquid-solid analog has been demonstrated for growth of Ge nanowires. [38][39][40] In another ap...