Supporting Differentiated Services in Computers via Programmable Architecture for Resourcing-on-Demand (PARD)

Ma, Jun; Sui, Xiufeng; Sun, Ninghui; Li, Yupeng; Zhang, Yu; Huang, Bowen; Xu, Tianni; Yao, Zhicheng; Chen, Yun; Wang, Haibin; Zhang, Lixin; Bao, Yungang

doi:10.1145/2694344.2694382

Cited by 28 publications

(8 citation statements)

References 59 publications

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“…Interference exists in a wide variety of settings [27,66,106] and resource isolation is crucial for delivering reliable performance for user workloads. There is a large body of work on isolation of various kinds of resources including compute time [61,14,23], processor caches [33,54,101], memory bandwidth [64,65,68,47,102], I/O bandwidth [38,92,67,71,93,99,103], network bandwidth [12,39,35,90,83,74,50], congestion control [25,42], as well as CPU involved in network processing [56]. Techniques such as IX [15] and MTCP [49] isolate data-plane and application processing at the core granularity.…”

Section: Related Workmentioning

confidence: 99%

Canvas: Isolated and Adaptive Swapping for Multi-Applications on Remote Memory

Wang¹,

Qiao²,

Ma³

et al. 2022

Preprint

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Remote memory techniques for datacenter applications have recently gained a great deal of popularity. Existing remote memory techniques focus on the efficiency of a single application setting only. However, when multiple applications co-run on a remote-memory system, significant interference could occur, resulting in unexpected slowdowns even if the same amounts of physical resources are granted to each application. This slowdown stems from massive sharing in applications' swap data paths. Canvas is a redesigned swap system that fully isolates swap paths for remote-memory applications. Canvas allows each application to possess its dedicated swap partition, swap cache, prefetcher, and RDMA bandwidth. Swap isolation lays a foundation for adaptive optimization techniques based on each application's own access patterns and needs. We develop three such techniques: (1) adaptive swap entry allocation, (2) semanticsaware prefetching, and (3) two-dimensional RDMA scheduling. A thorough evaluation with a set of widely-deployed applications demonstrates that Canvas minimizes performance variation and dramatically reduces performance degradation.

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Section: Related Workmentioning

confidence: 99%

Canvas: Isolated and Adaptive Swapping for Multi-Applications on Remote Memory

Wang¹,

Qiao²,

Ma³

et al. 2022

Preprint

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“…To best take advantage of such a coarse recon guration granularity, we believe that the system should "gang together" multiple pages that would bene t from being mapped to a high performance row and map them together. We believe such information about multiple pages can be communicated from the software to hardware via changes to the system software and can be done more easily by adopting new frameworks such as VBI [24], Labeled RISC-V [113], PARD [67], and XMem [107]. We leave the exploration of the (system) software stack for CLR-DRAM to future work.…”

Section: Memory Controller Address Mappingmentioning

confidence: 99%

CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off

Luo¹,

Shahroodi²,

Hassan³

et al. 2020

Preprint

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DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM access latency, their reduced storage capacities hinder the performance of workloads that need large memory capacity. Because the capacity-latency trade-o is xed at design time, previous works cannot achieve maximum performance under very di erent and dynamic workload demands.This paper proposes Capacity-Latency-Recon gurable DRAM (CLR-DRAM), a new DRAM architecture that enables dynamic capacity-latency trade-o at low cost. CLR-DRAM allows dynamic recon guration of any DRAM row to switch between two operating modes: 1) max-capacity mode, where every DRAM cell operates individually to achieve approximately the same storage density as a density-optimized commodity DRAM chip and 2) high-performance mode, where two adjacent DRAM cells in a DRAM row and their sense ampli ers are coupled to operate as a single low-latency logical cell driven by a single logical sense ampli er.We implement CLR-DRAM by adding isolation transistors in each DRAM subarray. Our evaluations show that CLR-DRAM can improve system performance and DRAM energy consumption by 18.6% and 29.7% on average with four-core multiprogrammed workloads. We believe that CLR-DRAM opens new research directions for a system to adapt to the diverse and dynamically changing memory capacity and access latency demands of workloads.

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“…In contrast, our work solves the resource co-allocation for a much more general real-time task setting. Ma et al [38] proposed PARD, a new programmable hardware architecture to improve QoS and resource utilization. However, PARD requires customized hardware support and is not suitable for COTS platforms.…”

Section: Related Workmentioning

confidence: 99%

Holistic Resource Allocation for Multicore Real-Time Systems

Phan

Choi

et al. 2019

2019 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)

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This paper presents CaM, a holistic cache and memory bandwidth resource allocation strategy for multicore real-time systems. CaM is designed for partitioned scheduling, where tasks are mapped onto cores, and the shared cache and memory bandwidth resources are partitioned among cores to reduce resource interferences due to concurrent accesses. Based on our extension of LITMUS RT with Intel's Cache Allocation Technology and MemGuard, we present an experimental evaluation of the relationship between the allocation of cache and memory bandwidth resources and a task's WCET. Our resource allocation strategy exploits this relationship to map tasks onto cores, and to compute the resource allocation for each core. By grouping tasks with similar characteristics (in terms of resource demands) to the same core, it enables tasks on each core to fully utilize the assigned resources. In addition, based on the tasks' execution time behaviors with respect to their assigned resources, we can determine a desirable allocation that maximizes schedulability under resource constraints. Extensive evaluations using real-world benchmarks show that CaM offers near optimal schedulability performance while being highly efficient, and that it substantially outperforms existing solutions.

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Supporting Differentiated Services in Computers via Programmable Architecture for Resourcing-on-Demand (PARD)

Cited by 28 publications

References 59 publications

Canvas: Isolated and Adaptive Swapping for Multi-Applications on Remote Memory

Canvas: Isolated and Adaptive Swapping for Multi-Applications on Remote Memory

CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off

Holistic Resource Allocation for Multicore Real-Time Systems

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