Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Zhang, Rui; Iwasaki, Takashi; Taoka, Noriyuki; Takenaka, Mitsuru; Takagi, Shinichi

doi:10.1149/1.3599065

Cited by 40 publications

(23 citation statements)

References 27 publications

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“…[55][56][57][58][59] Regarding the Ge MOS device, low nitrogen contents reduced D it at the MOS interface, whereas excess nitrogen degraded the interface. 60 The same trend was obtained in this work. Thus, moderate AlN passivation (achieved in the presence of a thin AlN layer) yielded an interfacial AlO x N y region with an optimum amount of nitrogen, which effectively eliminated defect states, consequently improving the MOS interface quality.…”

Section: -9supporting

confidence: 88%

“…The amount of nitrogen is expected to strongly influence the electrical properties, as demonstrated for Si and Ge MOS devices. [55][56][57][58][59][60] It was observed that nitrogen incorporation effectively improved the Si device property and reliability; however, excess nitrogen led to unfavorable interface charge and reduced mobility. [55][56][57][58][59] Regarding the Ge MOS device, low nitrogen contents reduced D it at the MOS interface, whereas excess nitrogen degraded the interface.…”

Section: -9mentioning

confidence: 99%

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Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

et al. 2015

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This paper presents a compressive study on the fabrication and optimization of GaAs metal–oxide–semiconductor (MOS) structures comprising a Al2O3 gate oxide, deposited via atomic layer deposition (ALD), with an AlN interfacial passivation layer prepared in situ via metal–organic chemical vapor deposition (MOCVD). The established protocol afforded self-limiting growth of Al2O3 in the atmospheric MOCVD reactor. Consequently, this enabled successive growth of MOCVD-formed AlN and ALD-formed Al2O3 layers on the GaAs substrate. The effects of AlN thickness, post-deposition anneal (PDA) conditions, and crystal orientation of the GaAs substrate on the electrical properties of the resulting MOS capacitors were investigated. Thin AlN passivation layers afforded incorporation of optimum amounts of nitrogen, leading to good capacitance–voltage (C–V) characteristics with reduced frequency dispersion. In contrast, excessively thick AlN passivation layers degraded the interface, thereby increasing the interfacial density of states (Dit) near the midgap and reducing the conduction band offset. To further improve the interface with the thin AlN passivation layers, the PDA conditions were optimized. Using wet nitrogen at 600 °C was effective to reduce Dit to below 2 × 1012 cm−2 eV−1. Using a (111)A substrate was also effective in reducing the frequency dispersion of accumulation capacitance, thus suggesting the suppression of traps in GaAs located near the dielectric/GaAs interface. The current findings suggest that using an atmosphere ALD process with in situ AlN passivation using the current MOCVD system could be an efficient solution to improving GaAs MOS interfaces.

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Section: -9supporting

confidence: 88%

Section: -9mentioning

confidence: 99%

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

et al. 2015

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“…13 [146]. The D it at smaller GeO 2 thicknesses can be improved by forming gas annealing [146] and to some extent by low-power plasma nitridation [147]. This should make the thin GeO 2 interfacial layer more robust against the deposition of the high-k layer.…”

Section: Geo 2 Passivation Layermentioning

confidence: 99%

Challenges and opportunities in advanced Ge pMOSFETs

Simoen

Mitard

Hellings

et al. 2012

Materials Science in Semiconductor Processing

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“…Fig. 3 shows the process flow of MOS capacitors using GeO 2 and ALD Al 2 O 3 [55,56]. Here, plasma oxidation was employed to form thin GeO 2 .…”

Section: Ge Gate Stack Technologiesmentioning

confidence: 99%

(Invited) MOS Interface Control Technologies for III-V/Ge Channel MOSFETs

et al. 2011

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MOSFETs using channel materials with low effective mass have been regarded as strongly important for obtaining high current drive and low supply voltage CMOS under sub 10 nm regime. From this viewpoint, attentions have recently been paid to III-V and Ge channels. However, one of the most critical issues for realizing Ge/III-V MOSFETs is gate insulator formation with superior MOS interface quality on Ge/III-V. In this paper, we focus on the possible solutions for gate stack technologies on Ge/III-V. As for Ge, GeO 2 /Ge interfaces have been regarded as promising. However, these interfaces have still employed thick GeO 2 layers. Recently, we have succeeded in thin EOT gate stacks with Ge oxide interfacial layers by using ECR plasma post oxidation. The high quality Al 2 O 3 /GeO x /Ge gate stacks were fabricated by exposing the ALD Al 2 O 3 /Ge structures to ECR oxygen plasma and oxidizing the Ge surface through the very thin ALD Al 2 O 3 layer. We present our recent results of the interface properties using this interface. As for InGaAs channels, we have also proposed a novel interfacial control technology utilizing InGaAs surface nitridation by ECR nitrogen plasma and successive post metallization annealing. This interfacial layer combined with an ECR sputtering SiO 2 or an ALD Al 2 O 3 gate insulator is shown to reduce D it down to low order of 10 11 cm -2 eV -1 . The physical origin of this D it reduction and the role of the nitridation are discussed.

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Suppression of ALD-Induced Degradation of Ge MOS Interface Properties by Low Power Plasma Nitridation of GeO2

Cited by 40 publications

References 27 publications

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

Challenges and opportunities in advanced Ge pMOSFETs

(Invited) MOS Interface Control Technologies for III-V/Ge Channel MOSFETs

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