2004
DOI: 10.1116/1.1830499
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Surface roughness in XeF2 etching of a-Si∕c-Si(100)

Abstract: Single wavelength ellipsometry and atomic force microscopy (AFM) have been applied in a well-calibrated beam-etching experiment to characterize the dynamics of surface roughening induced by chemical etching of a ϳ12 nm amorphous silicon ͑a-Si͒ top layer and the underlying crystalline silicon ͑c-Si͒ bulk. In both the initial and final phase of etching, where either only a-Si or only c-Si is exposed to the XeF 2 flux, we observe a similar evolution of the surface roughness as a function of the XeF 2 dose proport… Show more

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Cited by 13 publications
(3 citation statements)
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“…24) plasmas, and also in XeF 2 gases with 18 and without 12 Ar þ ion beams. Correspondingly, several theoretical and/or numerical studies have been made to interpret the roughness experimentally observed in plasma etching, using a continuum model, [13][14][15][16] Monte Carlo simulation, 15,16,22,23,28,29,31 and classical molecular dynamics (MD) simulation.…”
Section: Introductionmentioning
confidence: 99%
“…24) plasmas, and also in XeF 2 gases with 18 and without 12 Ar þ ion beams. Correspondingly, several theoretical and/or numerical studies have been made to interpret the roughness experimentally observed in plasma etching, using a continuum model, [13][14][15][16] Monte Carlo simulation, 15,16,22,23,28,29,31 and classical molecular dynamics (MD) simulation.…”
Section: Introductionmentioning
confidence: 99%
“…The precise control of Si etching in Cl-and Br-based plasmas is indispensable for the fabrication of gate electrodes and shallow trench isolation of field effect transistors (FETs) 1,2 through suppressing profile anomalies of sidewalls and bottom surfaces of the feature. 6,7 Atomic-or nanometer-scale roughness on etched feature surfaces of Si has become an important issue to be resolved in the fabrication of nanoscale microelectronic devices, [8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26] because the roughness formed during plasma etching would be comparable with the CD and the thickness of the layer being etched and/or the layer underlying; in addition, the nanoscale roughness of etched surfaces of SiO 2 , 21,24,27,28 metal, 22 metal oxide, 22 photoresist, [29][30][31] polymer/polymeric, 26,32,33 and low dielectric constant (low-k) films 21,27,34 has also be an issue of great interest similarly. In gate fabrication, the roughness on feature sidewalls is responsible for the line edge roughness (LER) and line width roughness (LWR), 35,36 which cause the variability in gate or channel length, and thus lead to that in transistor performance.…”
Section: Introductionmentioning
confidence: 99%
“…Several experiments have been concerned with the formation and evolution of surface roughness during etching of blank (or planar) Si substrates in SF 6 , 9,17,20,23,26 CF 4 /O 2 , 14 Cl 2 , 8,11,22 and Ar (Ref. 21) plasmas, and also in XeF 2 gases with 18 and without 12 Ar þ ion beams. Correspondingly, several theoretical and/or numerical studies have been made to interpret the roughness observed in plasma etching experiments, using a continuum model, [13][14][15][16] Monte Carlo simulation, 15,16,19,20,24,26 and classical molecular dynamics (MD) simulation.…”
Section: Introductionmentioning
confidence: 99%