Survey of hardware protection of design data for integrated circuits and intellectual properties

Abstract

This paper reviews the current situation regarding design protection in the microelectronics industry. Over the past ten years, the designers of integrated circuits and intellectual properties have faced increasing threats including counterfeiting, reverse-engineering and theft. This is now a critical issue for the microelectronics industry, mainly for fabless designers and intellectual properties designers. Coupled with increasing pressure to decrease the cost and increase the performance of integrated circuits, the design of a secure, efficient, lightweight protection scheme for design data is a serious challenge for the hardware security community. However, several published works propose different ways to protect design data including functional locking, hardware obfuscation, and IC/IP identification. This paper presents a survey of academic research on the protection of design data. It concludes with the need to design an efficient protection scheme based on several properties.

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

“…Figure 2 presents a dedicated threat model focused on an IP life cycle. Many dedicated threats target the IP life cycle and result to revenues losses for the IP designers [1], [2]. The IP threat model includes illegal re-use, illegal sales, cloning (illegal copy) of the IP.…”

“…In addition, the time-to-market is increasingly tight. This has made expensive devices the target of counterfeiting, cloning, illegal copy, theft and malicious hardware insertion (such as hardware Trojans) [1], [2].…”

Hare and Tortoise

“…In the classic supply chain management this threat existed already at the level of the top floor (ERP systems were already linked for example by EDI). [11], [3]) systematizes the knowledge in hardware security and design protection in the microelectronics industry, including a classification of threat models (hardware Trojans, IP piracy and IC overbuilding, reverse engineering, side channel analysis and counterfeiting), state-of-the-art defenses (design obfuscation, IP watermarking, IP fingerprinting, IC metering, split manufacturing IC camouflaging, IC information leakage reduction, key based authentication, noise injection secure-scan, physical unclonable functions PUF / unique IDs and aging sensors), and evaluation metrics for important hardware-based attacks. Using the network all connected systems at these two levels can be accessed and attacked.…”

An Ultra-Lightweight Transmitter for Contactless Rapid Identification of Embedded IP in FPGA

“…Nevertheless the IP business suffers from a lack a security due to the intrinsic form of IPs sales and exchanges. Many dedicated threats target the IP life cycle and result to revenues losses for the IP designers [1]. The IP threat model includes illegal re-use, illegal sales, cloning (illegal copy) of the IP.…”

“…Up to now, these three characteristics are not available in the state-of-the-art. To meet these requirements, in this letter we propose an ultra-lightweight binary frequency shift keying (BFSK) transmitter to forward IP identity (that could be generated for example by a feedback shift-register or a physical unclonable function [1]) discreetly using an electromagnetic channel. Such circuit is usually called "spy circuitry".…”