Survey of New Trends in Industry for Programmable Hardware: FPGAs, MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation in FPGAs

Ahmed, Syed Zahid; Sassatelli, Gilles; Torres, Lionel; Rouge, Laurent

doi:10.1109/fpl.2010.66

Cited by 20 publications

(11 citation statements)

References 3 publications

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“…The FPGA architecture has suffered important changes from the early 2000s until today [14]. Nowadays, FPGAs in the market are more and more equipped with optimized hard IPs for decreasing the power consumption.…”

Section: A Sensor Network and Fpgasmentioning

confidence: 99%

Leveraging the DSP48E1 block in lightweight cryptographic implementations

Piedra

Braeken

Touhafi

2013

2013 IEEE 15th International Conference on E-Health Networking, Applications and Services (Healthcom 2013)

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Field programmable gate arrays (FPGAs) are generally used in sensor networks for accelerating complex algorithms, either at node or gateway level. The apparition of FPGAs in the market equipped with special blocks for performing logic operations at high-speed and reduced utilization of the platform fabric, allows the implementation of a number of algorithms mainly based on these embedded resources. In this manuscript, we have focused on the Xilinx Artix-7 platform. We have evaluated how replacing logic functions in the implementation of GF (2 m ) arithmetics and lightweight block ciphers can reduce the area and, consequently, the cost of the platform. Moreover, we provide an update of an IEEE 802.15.4 accelerator extended with key negotiation capabilities described in previous work. Our results suggest that FPGAs can be employed for developing infrastructure for Wireless Medical Sensor Networks (WMSNs) in cases where encrypting and authenticating a large stream of sensed data is required. In that case, traditional sensor nodes, typically based on microcontrollers and clocked at low frequencies can be ill-suited for real-time applications. Moreover, the fact that large intervals of time are required for executing both encryption and authentication schemes can impact the battery lifetime of the node in comparison of utilizing a separate coprocessor (e.g. based on FPGA) that can be turned on and off when required. Finally, promising results in terms of cost and power consumption are expected when the smallest platforms of the Artix-7 series are available.

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Section: A Sensor Network and Fpgasmentioning

confidence: 99%

Leveraging the DSP48E1 block in lightweight cryptographic implementations

Piedra

Braeken

Touhafi

2013

2013 IEEE 15th International Conference on E-Health Networking, Applications and Services (Healthcom 2013)

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“…Reconfigurable devices could enable improved control systems, where designers can combine one or several RISC processors with dedicated computing hardware accelerators [10] implementing control algorithms, while enabling the integration of communication blocks (to support the fieldbus protocols) and other specialized peripherals. On the other hand, designers can also design custom hardware architectures for stringent applications in terms of performance, which when coupled with the embedded processors could help harness IP reuse and product diversification [7]. Furthermore, other advantages of FPGAs over competing technologies are their programmability on the field, customization through programmable logic, and the ability to tailor the communication protocols to a particular system configuration, among others.…”

Section: Trends In the Use Of Fpgas For Implementing Iedsmentioning

confidence: 99%

“…Many of these approaches point towards the introduction of specialized processing units, in the form of microprocessors [6], and increasingly as customized computing machines implemented in FPGAs [7].…”

Section: Introductionmentioning

confidence: 99%

Real-Time Control System for Improved Precision and Throughput in an Ultrafast Carbon Fiber Placement Robot Using a SoC FPGA Extended Processing Platform

Ochoa-Ruiz

Bevan

Lamotte

et al. 2017

International Journal of Reconfigurable Computing

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We present an architecture for accelerating the processing and execution of control commands in an ultrafast fiber placement robot. The system consists of a robotic arm designed by Coriolis Composites whose purpose is to move along a surface, on which composite fibers are deposed, via an independently controlled head. In first system implementation, the control commands were sent via Profibus by a PLC, limiting the reaction time and thus the precision of the fiber placement and the maximum throughput. Therefore, a custom real-time solution was imperative in order to ameliorate the performance and to meet the stringent requirements of the target industry (avionics, aeronautical systems). The solution presented in this paper is based on the use of a SoC FPGA processing platform running a real-time operating system (FreeRTOS), which has enabled an improved comamnd retrieval mechanism. The system's placement precision was improved by a factor of 20 (from 1 mm to 0.05 mm), while the maximum achievable throughput was 1 m/s, compared to the average 30 cm/s provided by the original solution, enabling fabricating more complex and larger pieces in a significant fraction of the time.

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“…Because of power and space constraints, hearing aids are generally designed using ASIC (application specific integrated circuit), which involves significant nonrecurring cost related to chip fabrication. This cost can be avoided by using FPGA for fast prototyping [20] - [22] before taking the design to ASIC stage. It provides flexibility especially when targeting designs with low-leakage currents in deep submicron chips [23], [24].…”

Section: Introductionmentioning

confidence: 99%

FPGA based implementation of comb filters for use in binaural hearing aids for reducing intraspeech spectral masking

Kambalimath¹,

Pandey

Kulkarni³

et al. 2013

2013 Annual IEEE India Conference (INDICON)

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Sensorineural hearing impairment is associated with decreased speech perception due to increased intraspeech spectral masking. For persons with moderate bilateral sensorineural loss, binaural dichotic presentation using a pair of complementary comb filters can reduce the effects of increased intraspeech spectral masking and thereby improve speech perception. It has been earlier shown that use of comb filters based on auditory critical bandwidths, with magnitude responses designed for perceptual balance of loudness and linear phase responses, resulted in a significant improvement in speech perception without adversely affecting localization of broadband sound sources. An FPGA-based implementation of these 513-coefficient filters with sampling frequency of 10 kHz is carried out for use in binaural hearing aids. Implementation using a 16-bit codec and 15-bit integer filter coefficients used 47%, 34%, and 53% of combinational functions, logic registers, and logic elements, respectively, available on "Altera Cyclone II EP2C70F896C6" FPGA. The resulting magnitude responses have a close match to the offline floating-point implementation.

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Survey of New Trends in Industry for Programmable Hardware: FPGAs, MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation in FPGAs

Cited by 20 publications

References 3 publications

Leveraging the DSP48E1 block in lightweight cryptographic implementations

Leveraging the DSP48E1 block in lightweight cryptographic implementations

Real-Time Control System for Improved Precision and Throughput in an Ultrafast Carbon Fiber Placement Robot Using a SoC FPGA Extended Processing Platform

FPGA based implementation of comb filters for use in binaural hearing aids for reducing intraspeech spectral masking

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