Switched resonators using adjustable inductors in 2.4/5 GHz dual-band LC VCO

Low‐power 2.4/5.15‐GHz dual‐band voltage‐controlled oscillator

“…The die microphotograph of the proposed circuit is shown in Figure 4. The overall die size is 0.85 Â 0.92 mm 2 . At the supply voltage of 1.8 V, the power consumption of the DVCO is 3.2 mW.…”

“…However, the VCO needs a varactor with large variable percentage in capacitance, which is usually unavailable in a standard CMOS technology. Another method is that switching devices are used in the inductance capacitance (LC) tank to change either capacitance [1] or inductance [2]. The resistance of the switching devices, however, is likely to cause the degradation of the tank quality factor (Q) and, consequently, the phase noise of the VCO.…”

Improvement of theQ-factor, for an adjustable inductor using a 90-μm silicon substrate on plastic

“…Series-connected Si-based inductors, with a metal-oxide-semiconductor field-effect transistor (MOSFET) switch, have been proposed for Low-noise amplifier (LNA) and voltage-controlled oscillator (VCO) circuits (Yim and Kenneth 2001;Koh, Park, and Yu, 2002;Kim et al 2011), but the separate, series-connected inductors occupy almost the entire chip area. In our previous work (Kao, Yang, Kao, Chang, and Lin 2008), we presented the switched resonator, which is an adjustable inductor connected with a MOSFET switch, in dualband VCO circuit. The major technological disadvantages associated with Si-based inductors, compared to their III-V counterparts, are large losses and noise from passive devices, due to the lower resistivity of Si substrate (Wu et al 2000;Chan et al 2001;Benaissa et al 2003;Chong, Xie, Yu, Huang, and Chang 2005;Chen, Chin, Yang, and Liu 2006;Kao et al 2008).…”

“…In our previous work (Kao, Yang, Kao, Chang, and Lin 2008), we presented the switched resonator, which is an adjustable inductor connected with a MOSFET switch, in dualband VCO circuit. The major technological disadvantages associated with Si-based inductors, compared to their III-V counterparts, are large losses and noise from passive devices, due to the lower resistivity of Si substrate (Wu et al 2000;Chan et al 2001;Benaissa et al 2003;Chong, Xie, Yu, Huang, and Chang 2005;Chen, Chin, Yang, and Liu 2006;Kao et al 2008). To minimise the substrate losses and reduce the size of the chip, we developed a four-port, adjustable inductor with 90-mm Si substrate on plastic using 0.18 mm CMOS technology.…”

“…To minimise the substrate losses and reduce the size of the chip, we developed a four-port, adjustable inductor with 90-mm Si substrate on plastic using 0.18 mm CMOS technology. We used floating port method instead of MOSFET switch to eliminate the parasitic effect and channel resistance of MOSFET (Kao et al 2008 ensure the signal pass through the port we wanted. The Q-factor of the inductor on ultrathin Si substrate with high resistivity bonded on plastic can be improved by 25-31%, but the inductance remains unchanged.…”