Switching Enhancement via a Back-Channel Phase-Controlling Layer for p-Type Copper Oxide Thin-Film Transistors

Abstract

P-type copper oxide (Cu x O) thin-film transistors (TFTs) with enhanced switching characteristics were fabricated by introducing a sputter-processed capping layer capable of controlling the back-channel phase (labeled as phase-controlling layer, PCL). By optimizing the processing conditions (the deposition power and postdeposition annealing parameters), the switching characteristics of the TFTs achieved a subthreshold swing of 0.11 V dec–1, an on/off current ratio (I on/I off) of 2.81 × 108, and a field-effect mobility (μFET) of 0.75 cm2 V–1 s–1, a considerable enhancement in performance compared to that of Cu x O TFTs without the PCL. Through optical/electrical analyses and technology computer-aided design simulations, we determined that the performance improvements were because of the Cu x O back-channel phase reconstruction through PCL deposition and subsequent annealing. The two factors that occurred during the process, sputtering damage and heat treatment, played key roles in creating the phase reconstruction by inducing a local phase transition that sharply reduced the off-current via controlling back-channel hole conduction. As a sample application, we fabricated a complementary metal oxide semiconductor inverter based on our optimized Cu x O TFT and an InGaZnO TFT that demonstrated a large inverter voltage gain of >14. The proposed approach opens up advancements in low-power circuit design by expanding the utilization range of oxide TFTs.

Progressive p-channel vertical transistors fabricated using electrodeposited copper oxide designed with grain boundary tunability

“…Typically, the previously reported preparation of p-type oxide channels has been presented using conventional vacuum sputtering deposition or sol-gel methods consisting of solution coating and high-temperature sintering. 16,17 However, the outstanding features of the vertical field-effect transistors have thus far been limited to n-oxide channels with spacer layers. 18 Typically, the channel length in vertical transistors has been defined by the thickness of the insulating spacers sandwiched between the source and drain electrodes for electrical isolation, and various spacer materials, such as organic polyimide films and inorganic silicon nitride (Si 3 N 4 ) and silicon oxide (SiO 2 ) layers, have been employed because of their relatively easy and controllable etching process.…”

Latest directions in p-type transparent conductor design

“…66 Nonetheless, Cu 2 O has seen resonable success, certainly as a proof-of-concept, as a p-type thin-film transistor (TFT). 67 Cr 2 O 3 is an antiferromagnetic insulator with an optical band gap of around 3.4 eV. 68 Strong electron correlation in Cr 2 O 3 results in a conduction band of 3d character, while the valence band is made up of Cr 3d and O 2p orbitals.…”

“…5,124 Cu 2 O can achieve the highest hole mobility, up to 256 cm 2 V À1 s À1 , 65 but when implemented as a TFT the mobility fails to surpass 1 cm 2 V À1 s À1 due to poor interfacing and grain boundaries. 67 SnO also suffers from deposition problems, with SnO 2 formation severely impacting the performance in TFT and complementary metal oxide semiconductor (CMOS) applications. NiO has the better chemical stability of the three, but suffers from low device mobility when implemented as a TFT, likely due to the localised holes generated by acceptor defects.…”

8‐5: Invited Paper: P‐Type Oxide Semiconductors for Displays: Material Design and Field‐Effect Devices

“…The poor electrical performances of Cu2O TFTs was attributed to a high density of defects at grain boundaries and at the semiconductor/dielectric interface, e.g., VOs and CuO secondary phase [21]. Several strategies are proposed to control these defects and to improve the performance and stability of Cu2O TFTs, including surface passivating [22,23], doping [24], using high-κ gate dielectrics (Al2O3, HfO2) [6]. For example, Chang and Nomura et al recently demonstrated the use of sulfur to reduce back-channel defect of p-type CuxO TFTs and achieved μsat of 1.38 cm 2 /Vs and on/off ratio of 4.1 × 10 6 [21].…”