2018
DOI: 10.1016/j.cose.2018.07.006
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Symbolic execution based test-patterns generation algorithm for hardware Trojan detection

Abstract: Hardware Trojan detection is a very difficult challenge. However, the combination of symbolic execution and metamorphic testing is useful for detecting hardware Trojans in Verilog code. In this paper, symbolic execution and metamorphic testing were combined to detect internal conditionally triggered hardware Trojans in the register-transfer level design. First, control flow graphs of Verilog code were generated. Next, parallel symbolic execution and satisfiability modulo theories solver generated test patterns… Show more

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Cited by 11 publications
(1 citation statement)
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“…The main purpose of Shen et al [ 159 ] is that generating a valid test pattern detects hardware triggers that are triggered in the internal RTL code. They analyze the Verilog HDL code generation control flow graphs (CFGs) in the gate-level netlist and use the symbolic execution and metamorphosis tests to generate the expected test vectors.…”
Section: The Prediction Of Future Trendmentioning
confidence: 99%
“…The main purpose of Shen et al [ 159 ] is that generating a valid test pattern detects hardware triggers that are triggered in the internal RTL code. They analyze the Verilog HDL code generation control flow graphs (CFGs) in the gate-level netlist and use the symbolic execution and metamorphosis tests to generate the expected test vectors.…”
Section: The Prediction Of Future Trendmentioning
confidence: 99%