Synchronizable protocol test generation via the duplex technique

Chen, W.H.; Lu, Ching-Sung; Chen, L.; Wang, J.T.

doi:10.1109/infcom.1990.91295

Cited by 8 publications

(5 citation statements)

References 2 publications

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“…In the traditional test approaches, the synchronization problem may occur in some conditions [10], [23]. For example, there is a synchronization problem in the following two consecutive test events: 11/O1, 12/02, where ll is input from LT, Oi is output to LT, and 12 is input from UT.…”

Section: Discussionmentioning

confidence: 99%

A modified transition tour protocol test method

Huang

Hsu

Lai

1994

Journal of Systems Integration

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Abstract. Protocol conformance test is a procedure to validate whether the implementation of a communication protocol conforms to its specification. A modified transition tour protocol test method is proposed in this paper. The modified transition tour protocol test method is based on the executable rule-based specification and implementation that are realized by using the OPS5 production system. Instead of using some optimization algorithms to minimize test sequences, the new test method is based on modifying test architectures and enhancing Formal Description Techniques' (FDTs) functionalities so that they are powerful enough to be used in both the design phase and the test phase. The corresponding test architectures for local, distributed, coordinated, remote, and ferry control methods also need to be modified. In this paper, we will present the major concept and the test procedure of the modi fled transition tour method. Additionally, we also present the logical design of the corresponding coordinated test system.

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Section: Discussionmentioning

confidence: 99%

A modified transition tour protocol test method

Huang

Hsu

Lai

1994

Journal of Systems Integration

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“…In [CLC90] Chen, et al defined a tightly synchronizable test sequence of a two-port FSM as a test sequence such that for any two consecutive transitions, the input port of the second transition is the same as the output port of the first transition. (Each transition was assumed to have at most one output symbol.)…”

Section: Previous Work On Synchronizable Test Sequences Of An Fsmmentioning

confidence: 99%

“…In [UW93] Ural and Wang considered two-port FSMs satisfying a number of conditions, including the necessary and sufficient condition in [BU91] and the condition that each state in the FSM possess two UIO sequences, one for the L-tester and the other for the U-tester. By modifying the algorithm in [CLC90] for the construction of a duplex digraph and by providing additional algorithms, they showed how to find a pair-synchronizable UIO-based test sequence of an FSM in polynomial time. In In [CU95] Chen and Ural allowed the L-and U-testers for a two-port FSM to communicate with each other, and they considered the cost of such communication in test sequence generation.…”

Section: Previous Work On Synchronizable Test Sequences Of An Fsmmentioning

confidence: 99%

Synchronizable test sequences of finite state machines

Tai

Young

1998

Computer Networks and ISDN Systems

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The finite state machine (FSM) model is commonly used for specifying communication protocols and other types of distributed systems. With the use of multiple testers for an FSM, the synchronization between inputs from different testers becomes a problem. A synchronizable test sequence of an FSM is a test sequence for which the synchronization problem either does not exist or can be solved by communication between testers. In this paper, we consider two testing strategies for an FSM: port-based testing, which does not allow testers for the FSM to communicate with each other, and group-based testing, which divides the ports of the FSM into groups and allows the testers for ports in the same group to communicate with each other. For each type of testing, we define a necessary and sufficient condition under which a test sequence of an FSM is synchronizable and show how to generate a set of testers according to a given test sequence. Also, we discuss the issues of test sequence generation and fault detection, and present the results of some empirical studies.

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“…In order to distinguish the type of synchronizable test sequence defined in (Sarikaya and Bochmann, 1984) from other types of synchronizable test sequences, the former is referred to as a pair-synchronizable test sequence in the remainder of this paper. (Chen et al, 1990) defmed a tightly synchronizable test sequence of a two-port FSM as a test sequence such that for any two consecutive transitions, the input port of the second transition is the same as the output port of the first transition. (Each transition was assumed to have at most one output symbol.)…”

Section: Figure 1 Fsm MI With Ports Pi P2 and P3mentioning

confidence: 99%

“…(Ural and Wang, 1993) considered two-port FSMs satisfying a number of conditions, including the necessary and sufficient condition in (Boyd and Ural, 1991) and the condition that each state in the FSM possess two UIO sequences, one for the L-tester and the other for the Utester. By modifying the algorithm in (Chen et al, 1990) for the construction of a duplex digraph and by providing additional algorithms, they showed how to find a pair-synchronizable UIObased test sequence of an FSM in polynomial time. (Guyot and Ural, 1995) extended the work by showing the construction of a digraph of an FSM M such that all paths in the digraph are pairsynchronizable test sequences of M and by showing that under certain conditions, a pairsynchronizable test sequence ofM can distinguish M from any FSM not isomorphic to M. (Chen and Ural, 1995) allowed the L-and U-testers for a two-port FSM to communicate with each other, and they considered the cost of such communication in test sequence generation.…”

Section: Figure 1 Fsm MI With Ports Pi P2 and P3mentioning

confidence: 99%

Port-synchronizable test sequences for communication protocols

Tai

Young

1996

Protocol Test Systems VIII

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In confonnance testing of a communication protocol, the synchronization between inputs from different testers for the protocol becomes a problem. A synchronizable test sequence of a finite state machine (FSM) is a test sequence for which the synchronization problem either does not exist or can be solved by communication between testers. In this paper, for a multi-port FSM with one tester for each port, we define a necessary and sufficient condition under which a test sequence of the FSM does not have the synchronization problem. Such a test sequence is called a port-synchronizable test sequence. Our empirical results show that an FSM may contain many port-synchronizable test sequences that are not synchronizable according to a previous definition of a synchronizable test sequence.

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Synchronizable protocol test generation via the duplex technique

Cited by 8 publications

References 2 publications

A modified transition tour protocol test method

A modified transition tour protocol test method

Synchronizable test sequences of finite state machines

Port-synchronizable test sequences for communication protocols

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